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Original question:

BQ25730: EN_FAST_5MOHM

BQ25730: Iin_DPM Maximum Current

Don Jordan
Prodigy 20 points
Part Number: BQ25730

(1) Table 9-1 lists the maximum Iin_DPM for when the BQ25730 is operating at 800kHz, but what about when it is running at 400kHz using a 4.7uH inductor?

(2) Section 9.5.1.9 of the data sheet shows that the IIN_DPM() register must be written with two consecutive bytes. However, Table 9-7 and the detailed description in section 9.6.6 indicate that it is read only. Which is it?

(3) The IIN_DPM() register seems to follow IIN_HOST() (I'm not using ICO), but with an offset that always makes it greater than IIN_HOST(). How is the DPM mode going to be triggered if the BQ25730 goes into host current limiting before then?

  • 0
    TI__Mastermind 22855 points

    Hi Don,

    1. From table 9-1, the IIN_DPM  is not related to the switching frequency or inductance. It averages the current sense for input current limit. 

    2. IIN_DPM() is a read-only register. Customer writes to IIN_HOST() to set the input current limit. 

    3. IIN_DPM is a mirror of IIN_HOST register, except ICO process may set it differently. 

    I hope it helps.

    Regards,

    Tiger

  • 0 in reply to Tiger Zhou
    Prodigy 20 points

    Dear Tiger,

    I thank you for your very prompt reply.

    (1) From Table 9-1 the "Maximum Input Current Limit (IINDPM)" appears related to the EN_FAST_5MOHM control and the RSR_RAC control bits plus the inductance as selected by the resistance at the IADPT pin. What is the Maximum Input Current Limit when the resistance at IADPT is 187k or 191k (selecting 4u7H and 400kHz switching)?

    (2) That's what I thought (and what I saw while testing). the reference to it as a two-byte write register in section 9.5.1.6 is confusing.

    (3) While IIN_DPM mirrors IIN_HOST, section 9.6.6 says that it also has an additional 100mA/200mA offset (for RSNS_RAC = 0b/1b). This makes the effective value of IIN_DPM always greater than that of IIN_HOST, so IIN_HOST will always be the limiting value. How is DPM mode then triggered?

  • 0 in reply to Don Jordan
    TI__Mastermind 22855 points

    Hi Don,

    1) 10A if RSNS_RAC=1 (5mohm), 6.35A if RSNS_RAC=0 (10mohm). 

    2)  We can't set zero mA current limit. The charge will change 0mA setting to 50mA (10mohm) internally. We call this minimum clamp as "an offset at code 0". The offset is only applied at code 0. there is NO offset at non-zero codes. IIN_DPM is always equal to IIN_HOST. Hope this clarifies. 

    Regards,

    Tiger

  • 0 in reply to Tiger Zhou
    Prodigy 20 points

    Dear Tiger,

    The zero offset at non-zero codes makes sense, otherwise the value in IIN_HOST would always control the current and that in IIN_DPM would have no effect in systems that did not use ICO. Section 9.6.6 of the data sheet makes it look like there is a 100mA/200mA offset for all non-zero codes.

    Thank you.