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BQ76930: shows Undervoltage after assembly

Part Number: BQ76930
Other Parts Discussed in Thread: BQ76940

Dear Sir or Madam,

I have the following problem.
We have an end customer who assembles batteries with our printed circuit boards.
This is a 10S2P battery.

On the PCB there is a BQ76930 and the communication BQ 78350.

In our firmware PF_EN, LIFETIME_EN and BBR_EN are already set before the battery is assembled.

Is it possible that any errors are set during the assembly of the battery and thus the cells are possibly discharged via the balancing fets?

After about two weeks after the assembly, the cells 6-10 sometimes show a very low voltage.

Image:

Our customer has a failure of about 30% of the assembled batteries.

An analysis could not find any defect on the PCB.

Attached are a few screenshots of the circuit.

Thanks in advance.

  • FET_EN is also set in the Firmware.

  • Hello Jan,

    1- Why is BAT pin connected to VC5x on the BQ76930? I suggest to look at section 7.2.3 bq76930EVM Schematic for direct schematic comparison.

    2- Did you measure the cell input pins and the AFE pins to see if the voltage matches? We want to make sure if it is a schematic or a FW issue.

    FET_EN shouldn't be a problem, but if after checking the upper two points there's no success, it'd be good to try to disable FET_EN.

    Regards,
    Jose Couso

  • Hello Jose,

    1. So if you look in the datasheet page 44 at Application and Implementation, they also have the Cf capacitor connected from Bat to VC5x there.


    And in the slvu925c bq76930 and bq76940 Evaluation Module User's Guide on page 55 there is also a capacitor from Bat to VC10X:

    2. Yes, we measured the cell voltages before assembly and two weeks after.

    Before that, all cell voltages were fine. Two weeks later, during a check with the BQ Studio, some cells were so low (measured and read).

  • Hello Jan,

    Was there a load attached during these two weeks? It would be good to try disabling FET_EN by default and see if this fixes the issue.

    In what operating state is the BQ76930 when they are left untouched for two weeks? 

    Also looking at your schematic:
    1- I do not see a diode from VC5 to VC5X (the device can get damaged). 

    2- Input cell resistors are below the recommended range (the minimum should be 500 Ohms)

    3- REGSCR circuit (AKKU+) should be connected to cell-10 instead of BAT+

    Regards,
    Jose Couso

  • Hello Jose,

    1. yes these diodes are present but unfortunately not in the screenshot shown above.

    2. according to the data sheet, the maximum balancing current without external balancing fet is specified as 5mA (Icb) (data sheet page 9).

    Thus for us the calculation is:
    1. I= 4.2V (cell max voltage) / (2*470Ohm) --> = 4.468mA
    2. I= 3,2V (Cell Min Voltage) / (2*470Ohm) --> = 3,404mA

    3. yes, but cell 10 of a 10S battery is also BAT+.

  • Hello Jan,

    2- The standard schematic uses large input filter resistors to reduce transient voltages to the inputs. But yes, if you wish to maximize the internal ICB, then your logic is correct. Note: The power filter must also be reduced (filter for the VCnX pins) to prevent the cell inputs from swinging faster than the power pins and exceeding the device absolute maximum limits. Significant pack level transient suppression may be required.

    3- 

    Typically we recommend to connect REGSRC to BAT+ directly to avoid voltage drop through the Cell-10 path; this way the source for REGSRC is more stable. But if your application is ok having some voltage drop through the input resistors, then is ok.


    Was there a load attached during these two weeks? It would be good to try disabling FET_EN by default and see if this fixes the issue.

    In what operating state is the BQ76930 when they are left untouched for two weeks? 

    Please provide more info to further help on this issue. Also, see if disabling FET_EN works for you.

    Regards,
    Jose Couso