TPS54A20: Series buck converter small signal model

Part Number: TPS54A20

Hi experts,

Last time I asked the question about the small signal model of the power stage.

and I get a response from the Tier, he said the power stage is the same as the traditional buck converter, is this correct?

https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1138150/tps54a20-series-capacitor-buck-converter

there is a capacitor called Ct in the circuit, why the small signal model is the same? could you please explain it in more detail to me?

Does Ti have a SIMPLIS simulation file that could provide to me, let me check the circuit function and bode plot?

because I would like to design a series capacitor buck and I would like to make sure how to model the small signal model of SCB.

Please give me some suggestions.

Thanks in advance.

over 1 year ago

0 Yitzhak Bolurian over 1 year ago

TI__Mastermind 18370 points

Hello Jack,

The capacitor Ct acts as an intermediate voltage source for the inductor and as such does not interfere in the small signal modeling.
The small signal model for the power stage remains the same, just with effective VIN/2 and L/2.

If this addresses your question, please set the status of this post to resolved.

Regards,

Yitzhak Bolurian

0 J over 1 year ago in reply to Yitzhak Bolurian

Expert 1035 points

Hi Yitzhak,

OK, I will see the app note for more detail.

by the way, does TI have a SIMPLIS file that can provide to me?

or any design tool?

Jack

0 Yitzhak Bolurian over 1 year ago in reply to J

TI__Mastermind 18370 points

Hello Jack,

Unfortunately, no small signal design tool or SIMPLIS model for TPS54A20.
Just Pspice transient and Webench available.
I will inform you if any changes in the availability.

Regards,

Yitzhak

0 J over 1 year ago in reply to Yitzhak Bolurian

Expert 1035 points

Hi Yitzhak,

Thanks.

One more question, why the duty cycle is limited to 50%?

I can't very understand what the paper said.
Could you please give me an example?

Jack

+1 Yitzhak Bolurian over 1 year ago in reply to J

TI__Mastermind 18370 points

Hello Jack,

This waveform shows a full cycle of what the application note describes in Figures 5, 6 & 7:

As you can see, if we do not want Ct+ (Charge) and CT- (Discharge) intervals to overlap, we need to keep duty cycle limited to 50%.
Please do not forget to set the status of this post to resolved.

Regards,

Yitzhak

0 J over 1 year ago in reply to Yitzhak Bolurian

Expert 1035 points

Thanks.

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TPS54A20: Series buck converter small signal model