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LP8764-Q1: current limit, startup slew rate

Part Number: LP8764-Q1

I would like to know how the current limit works during normal and startup operation. In one of my applications I have a 1.2V output , Lout=1uH, Fsw=2.2MHz in FPWM mode and with slew rate set at 10mV/us. With this slew rate, the expected output rise time is 120us and I'm getting very close reading. I recently realized that there are more output capacitance on the board for a total of 958uF. With this output capacitance and 120us rise time the charging output current should be ~ 9.6A. I would think this pulse current during power up should trigger the current limit setting of 4.5A but the output seems to power up regardless. I have other rails that have a similar situation and I would like to understand the Ilimit function during power up. 

Thanks,

Alek

  • Hello Alek,

    The way current limit is handled depends on configuration.

    By default, current limit detection while the output voltage still remains within the power good threshold is treated as a warning, non-catastrophic error. When such an error occurs, the device detects the error and handles the error through the interrupt handler. The nINT pint is driven low to signal an interrupt event has occurred while the device remains in the operation state.

    Reading the values of registers INT_TOP and INT_BUCK1_2 or INT_BUCK3_4 will let you know detection is happening correctly.

    Best regards,

    Florian

  • Hi Florian,

    Thanks for letting me know about the Ilmt behavior during normal regulation mode, i.e. PGOOD is true. My question on Ilmit is during initial power up before PGOOD is true. As I mentioned during initial output voltage ramp up, after it's enabled, due to fast slew rate of the charging current for output capacitors, output current would exceed the Ilmt setting of 4.5A. What's the current limit scheme for this case? Is it peak current limit, pulse by pulse limit? With the mentioned current operation do you expect the Ilimit to be triggered? 

    Please let me know.

    Thanks,

    Alek

  • Hello Alek,

    According to the datasheet: The BUCKn_VMON_EN bit enables the overvoltage (OV) , undervoltage (UV) and short-circuit (SC) comparators. The current limit (ILIM) comparator of each BUCK regulator is activated as soon as the corresponding BUCK regulator is enabled. In order to add the current limit indication of a BUCK regulator to the PGOOD signal, the BUCKn_VMON_EN bit of the corresponding BUCK regulator must be set.

    Depending on your configuration, the current limit may not be included in PGOOD signal. Did you check the value of the interrupt registers ?

    Best regards,

    Florian