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LM74502H: Inconsistent UVLO behaviour

Part Number: LM74502H

I'm experiencing inconsistent behaviour with a LM74502H configured as an input surge stopper, with UVLO.

The UVLO/EN pin is connected through a resistor divider to operate falling/rising at 1.14v/1.24v(nom) respectively.  The falling edge switch-off behaviour is correct, and predictable, but the device does not reset consistently on the rising edge, sometimes as high as 1.5V

What could be causing this behaviour?  I observe the same thing when using the application schematic "9.3 Input Surge Stopper" from the datasheet. The FETs are IPD034N06N3.

  • Hi Michael,

    Please share the following information,

    1. Waveform captures with the below signal captured during  EN/UVLO rising edge.
      1. EN / UVLO, VCAP, VS, GATE and VCAP-VS (using MATH Function)
      2. Vin, Vout, GATE, EN / UVLO
    2. Schematics in PDF