LMR36015-Q1: OVP Mechanism

Hi Chia,

The device is protected by thermal shutdown, input, undervoltage lockout, cycle-by-cycle current limit, hiccup short-circuit protection. 

If VOUT or FB is shorted to GND, the device can be damaged if VIN > 16V. Otherwise it will attempt to make VOUT = 0V.

For more information, check out the functional safety document: 

https://www.ti.com/lit/fs/snva922c/snva922c.pdf?ts=1690236195090&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FLMR36015-Q1

Thanks,

Andrew

Hi Andrew,

I think we can separate the OV phenomenon by 2 scenario:

1. The Vout is short to other power rail and cause higher Vout but less than 16V, in this case, I believe the PWM will keep minimum on-time until it reach thermal shutdown.

2. The FB is somehow short to supply or GND lower than 16V, in that case the IC will still keep minimum on-time. 

Kindly correct me if I was wrong.

Quite confused about the term you used here.

Attempt means it will still keep the minimum on-time right?

Andrew Kutzler said:

Otherwise it will attempt to make VOUT = 0V.

Hi Chia,

1. If VOUT/FB is shorted to another power rail, then the it will keep the PWM at the minimum on time.

2. If FB is shorted to GND, this triggers the Hiccup timeout (since FB < 0.4V), and the device waits ~94mS before attempting to switch again.

In my earlier comment, attempt means switch at minimum on time.

Thanks,

Andrew