TPS55165-Q1: SMPS Maximum Output Capacitance

Hi Egemen,

Because this device integrates the loop compensation network, so it is strongly recommended to select 18uF to 47uF output capacitor, if you use higher value, you need to evaluate the loop stability.

BRs,

Bryce

Hi Bryce

After the output capacitance, there are other capacitors that use the same output label. Can these capacitors cause any trouble?

Hi Bryce,

In the datasheet, are these capacitance values DC bias derated or not?

For the design, can LDO output capacitances affect the loop stability?

Best Regards.

Hi Bryce

What do you mean when you say LDO supply needs to be clear? How can we assure that?

Also, when you say nominal values you mean not derated values is that right?

Hi Egemen,

It is recommended to add 4.7uF cap close to VREG pin to keep the internal LDO voltage stable.

Yes, I meant the nominal value is not derated value.

BRs,

Bryce

Hi Bryce

I mean not the internal LDO capacitance of the SMPS. Does the output capacitance of the other external LDOs that use SMPS output as input voltage (for example, to regulate SMPS output 5V to 3V3, etc.) affect the loop stability of the SMPS?