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TPS54KB20: Why VOUT OVP is enabled prior to SS phase?

Albert Sun
Intellectual 330 points
Part Number: TPS54KB20

Hi,

I am confused by the descriptions below when viewing the datasheet. Does it mean that output voltage will always have a drop when it is high prebiased?

I do not think it is a good behavior as the leakage from one rail to other rail which exerts the prebias to the rail which TPS54KB20 supplies is very normal. Usually VOUT OVP and VOUT UVP shall be disabled until SS is completed. Please share me with reason doing this.

-A

  • 0
    TI__Expert 6926 points

    Hi Albert,

    First, let me clarify that "high pre-biased output" means FB voltage exceeding the 116% of VREF(900mV), so OVP wouldn't be triggered if VOUT is pre-biased but below the OV threshold level.

    It is safer to keep OVP enabled at all times, including before startup, because OVP is meant to protect the load from excessive voltage levels that could damage the connected devices.

    Thank you,
    Tomoya