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TPS65233: Register 0x2 bit5 temporary workaround inquiry.

Part Number: TPS65233

Background: We are having an issue with our products SW when controlling TPS65233 over I2C. Root cause is in the software that we currently cannot prevent it reading 0x2 register from the LNB controller. By unfortunate coincidence reading "1" on reg 0x2 bit5 (LDO_ON) we end up in an infinite read loop to register 0x2. As expected this happens every time when we are powering the LNB. The SW fix isn't trivial and we are looking for any workaround for the meantime to prevent the issue when TPS6533 LDO/Boost is enabled.

Is there any way to force read-only register 0x2 bit5 LDO_ON to value 0 AND have functional DC/tone feeds at the same time? Datasheet says nothing about such novel use case, but I'd like to double check.

Thanks!