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TPS659037: tolerance of timing sequencing

Part Number: TPS659037

What is the minimum and maximum sequencing time per step on the TPS6590379?  I have an application where I'm powering the PMIC with 3.3Vin and I'm bypassing LDO1, SMPS9, and LDOUSB with load switches to provide power to the 3.3V loads that are normally powered by these regulators.  I want to ensure the soft start time and discharge time on my load switch doesn't exceed the next sequence.

The app note https://www.ti.com/lit/ug/sliu011f/sliu011f.pdf  mentions 550us per sequence step, but doesn't give me a tolerance.  Also, this E2E post "e2e.ti.com/.../tps659037-off2act-power-sequence-timing"  mentions one of the sequence steps is around 900us.  So I need some clarification on the sequence timing, specifically around the LDO1, SMPS9, and LDOUSB.  I'll be using the output of LDO1 and LDOUSB to enable my load switch associated with those rails and REGEN1 for the load switch that bypasses SMPS9.