TPS65930: Through the I2C configuration register, after writing the corresponding device address and register address, the reading of data bits is inconsistent with what it wrote

Hello liguidong,

we do not focus on this part, but in order to better help you please provide your schematics regarding this part. 

Hi,Nicholas,

My detailed question is shown below.

I want to give VPLL1_ The TYPE register writes a data 0x12 with device address 0x4A and register address 0x4A. When I was writing and reading data, I used an oscilloscope to capture the timing chart of writing and reading.

This is a schematic diagram of the standard IIC writing timing:

This is the IIC write timing chart I captured using an oscilloscope:

This is a schematic diagram of the standard IIC reading timing:

This is the IIC reading timing chart I captured using an oscilloscope:

The timing charts for writing and reading data meet the standard IIC timing chart requirements, but there is a discrepancy between the data I wrote and the data I read. So could you please help me answer the possible reason for the inconsistent data read and written during IIC communication?

Regards,

Liguidong