Other Parts Discussed in Thread: TPS3808E-Q1, TPS3808-Q1, TPS3808
Hello,
Please clarify the Tpd with respect to Vt SENSE trip to RESETN asserted delay.
From the spec of the device TPS3808E-Q1
Or TPS3808-Q1
for the typical Tpd delay is 20-30us and maximum of 50us.
Whereas the EVM board, reference Figure 14 :
The Tpd delay is about 20ms given the SENSE is 0.405V and more if any other V SENSE.
How do you explain the discrepancy between the device spec sheet and measurement of EVM board ?
If so could you confirm the spec is guaranteed of 50us maximum delay ?
Please note that the Tpd delay of MR\ to RESET\ is within the spec according to the measurement of EVM board.
