[FAQ] TPS65931211-Q1 used with AM62A for eFuse programming: If there are any limitations with respect to the key writer software implementation of "LDO1_CTRL/LDO2_CTRL" registers

Hello Zenanding,

GPIO9 and GPIO11 have their internal pulldowns enabled by default. So LDO1 and LDO2 will not accidentally power while to GPIOs float. 

zenanding said:

If we use software implementation of "LDO1_CTRL/LDO2_CTRL" registers, does there exsist any risks?

From the PMIC standpoint, there isn't any risk. Just be mindful that the PFSM will still set LDOx_EN bits to 0 according the various power down and low power mode transitions outlined in the TPS65931211 user guide.

https://www.ti.com/lit/pdf/slvucm3