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TPS3897: TPS3897ADRYR: startup delay parameter

Part Number: TPS3897

Hello: 

Schematic is the following: 

Timming is the fillowing: 

My question is the following: 

1. Whether output waveform will link with VCC ramp up Tr or not? If the ramp out is very fast, for example VCC going to 3.3V within 20us, what will happen?

2. When 0<Vcc<V(POR), equal to the VCC because of pull-up R623

3. When Vcc=V(POR), whether out goes to low immediately or need to delay a short time? Whether statup delay need to consider this time slot or not?

4. When Vcc>VCC threshold, out goes to high with Td. Because of power on progress, the Td=startup dealy (50us)+ tpd (r)?

Thanks a lot~

  • Hi Ying Cheng,

    My answer is as follow.

    1. Whether output waveform will link with VCC ramp up Tr or not? If the ramp out is very fast, for example VCC going to 3.3V within 20us, what will happen?
    The Vpor spike on the output is going to be minimized, pretty much the duration of VCC going from 0V to Vpor, is going to be the duration of the Vpor spike. After hitting Vpor, output will stay low until Vsense goes above Vit. When the device goes below Vpor, the device is fully shutdown without delay. So output will read  as the VCC voltage.

    2. When 0<Vcc<V(POR), equal to the VCC because of pull-up R623

    3. When Vcc=V(POR), whether out goes to low immediately or need to delay a short time? Whether statup delay need to consider this time slot or not?

    Once VCC surpass Vpor, output will go low immediately. Startup delay needs to be considered every time the device start up below Vpor. Startup delay only initialize after VCC is greater that 1.7V

    4. When Vcc>VCC threshold, out goes to high with Td. Because of power on progress, the Td=startup dealy (50us)+ tpd (r)?

    This is correct.

    Jesse 

  • Thanks for your answer.

    About question No.1, could you pleaes clarify the response time of TPS3897 internal circuit? I want to konw whether output will be unknown because of very fast ramp up VCC for example 1us (0 to 3.3) or faster?

  • Hello Ying Cheng,

    When VCC is below VPOR, the input voltage is not yet high enough for the device to hold the output low during startup so the output will be in an undefined state. After VPOR the output will be held in a defined low state until Vit is crossed. This sequence will not be affected by a fast ramp up. The output will spend less time in the undefined and low state with a fast ramp up. The output will be unknown below VPOR but it will be small. 

    Thanks,

    Walter