UCD90160A: The variation of READ_VOUT is large on UCD90SEQ64EVM-650.

Hi

YOu have to check the wave to see whether there is any ripple on the voltage since UCD does not measure RMS voltage.

Do you have decouple caps at the MON pins. do you have 4.99ohms resistor between V33A and V33D.

Also the V33A ripple can impact the accuracy.

Please share you project also 

Regards

Yihe

Hi Yihe,

The project is UCD901XXX EVB board UCD90SEQ64EVM-650 which is provided by TI.
The is no decouple caps at the MON PINs. There is a FB between V33A and V33D.
I added one 10uF cap at MON1 PIN and replace the FB with a 4.99ohms resistor, but looks like there is no much improvement, the variation still can reach 18mV(observed on Fusion software).
The ripple at VAA is about 7.5mV, and the noise at MON1 pin is very low（<2mV）. One more phenomenon I found is that the ripple is higher when Fusion enable start polling. 

I think VAA is used as vref of MON, 7.5mV of ripple of VAA will not cause MON variation up to 18mV. 

BR,

Junshan

Hi, Junshan,

Can you send the project file (.xml) for us to have a look?

Regards

Anne Ngo

Texas Instruments

Hi Anne Ngo,

Here is the link of user guide of UCD90SEQ64EVM-650.

UCD90SEQ64EVM-650: 64-Pin Sequencer Development Board (ti.com.cn)

Also, you can search the key word 'UCD90SEQ64EVM-650' in TI web. The first result will be this board.

BR,

Junshan

Hi Anne Ngo,

One more question about the calculate format. In your SLVA385 document, the format is :

[St] [AddrW] [A] [W:x8B] [A] [Sr] [AddrR] [A] [R:Data_1] [A] [R:Data_2] [N] [Sp]

Actually, the format is

 [St] [AddrW] [A] [W:x8B] [A] [Sr] [AddrR] [A] [R:Data_1] [A] [R:Data_2] [A] [R:Data_3] [N] [Sp]

Data_1 and Data_2 are used to calculate the voltage. I don't know what Data_3 is for?

Here is the link of SLVA385 :

Monitoring Voltage, Current and Temperature Using the UCD9012x (ti.com.cn)

Please help to check it.

BR,

Junshan

Hi, Junshan,

Can you send us the project file (.xml) saved using Fusion GUI, not the SLVU423. To save the project file (.xml), on GUI device window, click on File menu, and then click on "Save Project As...".

Regarding extra byte as "Data_3", what software you use to read the voltage? 

Regards

Anne Ngo

Texas Instruments

Hi Anne Ngo,

Here is my project file. If there is something wrong with the configuration, please correct me. Thank you.

UCD90160A @ PMBus Address 101d Project_Junshan.xml

For the extra byte 'Data_3', I used SMBus & I2C & SAA Debug Tool to read the voltage. See the capture below, I can read 3 bytes consecutively. Also, I monitored these 3 bytes on the oscilloscope.

BR,

Junshan

Hi 

Have you probed the voltage on the scope? UCD does not measure RMS voltage. so ripple will be detected.

As for the 3rd byte, UCD will return the PEC byte if you read one extra byte.

Regards

Yihe

Hi Yihe,

Yes, I have probed the voltage at MON1 pin, the ripple is less than 2mV.

BR,

Junshan

Hi

The EVM does not have the optimization that we put into https://www.ti.com/lit/pdf/slvub50 to improve the accuracy.

Using 4.99ohms between V33A and V33D shall help plus add decoupling caps on each MONs.

Regards

Yihe

Hi Yihe,

As replied at first time in the trend, I have modified the circuit on the EVM as you suggested, but there is no much improvement. Could you show the result on your EVB board?

BR,

Junshan

Hi Yihe,

What is the function of PIN47 BPCAP? the ripple at this pin is about 13mV, the frequency is 25MHz. See the picture below. Does this affect the result?

 Also, I modified the circuit on UCD90SEQ64EVM, VDD is supplied from an ultralow noise LDO. I tested the ripple at different points, V33DIO1/V33DIO2 are about 7mV. The ripple of VAA is about 3mV. But there is no improvement after this modification.

BR,

Junshan 

Hi

BPCap is to support internal core voltage and it shall not impact here.

Do you have the MON ripple capture?

Regards

Yihe

Hi Yihe,

I have tested the ripple at MON1, V33DIO1, V33DIO2, VAA and the base noise of the oscilloscope. 

Capture1: ripple at MON1 (oscilloscope full bandwidth).

Capture 2: ripple at MON1 (oscilloscope bandwidth limited）

Capture 3: ripple at V33DIO1 (oscilloscope full bandwidth）

Capture 4: ripple at V33DIO2(oscilloscope full bandwidth）

Capture 5: ripple at VAA(oscilloscope full bandwidth）

Capture 6: ripple at VAA(oscilloscope bandwidth Limited）

Capture 7: base noise of the oscilloscope (the probe is still installed on the oscilloscope )(oscilloscope full bandwidth）

Capture 8: base noise of the oscilloscope (the probe is still installed on the oscilloscope )(oscilloscope bandwidth Limited）

BR,

Junshan

HI

Thank you for the capture.

As for the scope, please make sure that AC couple is used and adjust both vertical/time scale so that the fluctuation pattern is shown.

ADC sampling is not synchronized with power stage’s switching frequency, therefore the sampling point may occur at any point within a switching period, as a result, the rail’s voltage ripple could be reflected on the ADC reading.

But as said EVM is not optimized for this and the ADC accuracy of UCD shall follow the data sheet spec.

Regards

Yihe