TPS62843: Resistor needed between EN and VIN?

Hello Christoph,

Thank you for reaching out,

You can directly connect VIN to EN.

An internal 500-kΩ resistor pulls the EN pin to GND and avoids floating the pin. This action prevents an uncontrolled start-up of the device in case the EN pin cannot be driven to low level safely. With EN low, the device is in shutdown mode. The device is turned on with EN set to a high level. The pulldown control circuit disconnects the pulldown resistor on the EN pin once the internal control logic and the reference have been powered up. With EN set to a low level, the device enters shutdown mode and the pulldown resistor is activated again.

Thank you & regards,

Moheddin.

Hi Moheddin,

thanks for the answer! But I think we are talking past each other a bit :-)

When the internal FET of the UVLO/Thermal Shutdown is activated, the EN pin will be pulled down to GND through the FET, so there is a low-impedance path between EN and GND, and thus between VIN and GND if EN is connected directly to VIN. How is it achieved that there won't flow a short circuit current when the internal FET of UVLO/Thermal Shutdown is activated? An additional internal pull-down resistor does not have any effect on the low-impedance path created between VIN -> EN -> GND, if the internal FET is activated, right? Maybe there is an additional series impedance integrated between EN Pin and the block "Device Control and Logic ... Smart Enable/UVLO/Startup Handling/Thermal Shutdown"?

Thanks and best regards

Hello Christoph,

Moheddin Pasha Shaik said:

An internal 500-kΩ resistor pulls the EN pin to GND

There a 500kOhm internal resistor between the drain of the transistor and the dot as shown below. 

I hope you understand now.

Thank you & regards,

Moheddin.

Hi Moheddin,

the MOSFET is only there to activate/de-activate the internal pull-down resistor on the EN pin? I thought, the UVLO or thermal shutdown is controlled through the FET (disable the device by pulling EN to low/GND in case of failure event).

Best regards

Hello Christoph,

The FET acts like a smart enable. When EN is disabled the internal 500-kΩ resistor pulls the EN pin to GND. This also happen when device is disabled due to UVLO or thermal shutdown.

Thank you & regards,

Moheddin.