UCC28631: VSENSE pin open or short pin-check

Hi Kazuki-San,

Thank you for reaching out.

- VSENSE pin open (or Thevenin resistance of the divider pair across the aux winding is too large > 20k, or one or other of those resistors is open)

- VSENSE pin shorted to GND (or Thevenin resistance of the divider pair across the aux winding is too small < 10k, or one or other of those resistors is shorted)

So the IC checks this condition at startup. If the Rth is violated there is a fault detected through the above condition.

Regards,

Harish

Hi Harish-san,

Thank you for your reply.

My customer uses UCC28631 for high-side buck application.

So RA is connected to VOUT via diode, and not connected to the aux winding.

Both RA and RB are 10kOhm+/-5%. So Rth=5kOhm.

Do you think this divider is okay?

My customer told me that the UCC28631 didn't start-up when both RA and RB are 33kohm.

I think this means open-fail was detected by RB larger than 20kOhm. Do you think my assumption is correct? 

Best regards,

Kazuki Itoh

Hi Kazuki-San,

Yes I think the reasoning is correct.

But using Rth 5kohm might also be an issue.

Regards,

Harish

Hi Harish-san,

Thank you for your comment.

Why do you think Rth=5kOhm is an issue?

How much resistance should my customer choose for RA and RB for high-side buck application?

Best  regards,

Kazuki Itoh

Hi Kazuki-San,

It is advisible to keep in 10-20kohm range. But this IC has not been tried in any design as a High side buck topology. So we might need to check this on the actual design.

Thank you

Regards,

Harish

Hi Harish-san,

My customer's schematic looks similar to PMP20495.

In the past thread, you mentioned that the IC basically senses the input voltage by injecting some current and measuring the voltage level into the the effective thevenin equivalent of Ra||Rb.

https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1166075/ucc28631-uv-detection-threshold

If that is the case, in high-side buck topology, I believe only RB affects the open/short pin-check, correct?
As the injected current doesn't flow through RA, the thevenin resistance doesn't affect the open/short pin-check.
So I thinkg it should be okay if RB is within 10-20kOhm range.
Please check with design team.

Best regards,
Kazuk Itoh

Hi Kazuki-San,

I checked this high side buck topology.

During the ON time of MOSFET the current will be injected out of the Vs pin and this will provide a measure of the input voltage.

So startup voltage will be Ivsl(run)*(R1+R2)

During the OFF time when the output voltage is sensed the sensing path is as follows:

So the Vs pin see o/p voltage scaled by the combination of R1 and R3

So it would be better to keep the thevenin equivalent in the range of 10-20kohm by adjusting R1 and R3. The above schematic shows around 11kohms which is ok.

Thank you

Regards,

harish

Hi Harish-san,

As mentioned above, when my customer tried R1=33k and R3=33k and R2 is open, the device didn't start-up correctly.

When R1=10k and R3=10k and R2 is open, the device started up correctly.

It should mean that the thevenin equivalent of R1 and R3 doesn't work for the UCC28613 with high-side buck topology. 

I think the start-up voltage will be IvsI(run) * R3*(R1+R2)/(R3+R1+R2).

So I guess it is needed to keep R3*(R1+R2)/(R3+R1+R2) in the range of 10k - 20k.

Could you please comment on it?

Best regards,

Kazuki Itoh

Hi Kazuki-San,

I do not see a parameter Ivsl(run) in UCC2863x device like in UCC2871x device. But there might be an internal parameter but it is not mentioned. Generally from other controllers, this is usually between 200-275uA. The above schematic shows values satisfy this as well as the equivalent Rth as you derived above which is more likely to be correct values.

The startup voltages are 80Vac for UCC28631 and it is sampled by the Vsense winding.

They might want to check the Vsense pin waveform in both the cases

Thank you

Regards,

Hi Harish-san,

How should my customer verify the Vsense pin is okay?

The 10k-20k RTH range described in UCC28631 is not applicable to the high-side buck topology.

The VSENSE pin voltage range at the start-up is not described in the datasheet.

Best regards,

Kazuki Itoh