UCC28C53: Gate Frequency and Falling Edge Spikes

Hi,

The spikes are usually related to your board layout. You need to make the gate connection to the MOSFET with small loop to help this.

On the variable frequency, please provide the FB, CS, COMP along with the OUT waveforms to help find why is that.

Here are the waveforms

FB

CS

COMP

OUT

Hi,

For the below time what is CS waveform?

Are you asking for a waveform of CS and COMP at the same time? 

Hi,

CS, COMP and Gate when show the gate is randomly change like the below:

Here is that waveform: 

Hi,

What is the time between the two vertical white lines?

Can you retake the below with CS vertical scale 100mV/div? Also add a waveform of pin 4 of U400 into the below.

Also, try the below:

- remove R408, then retake the below waveforms

- remove R408 and change C423 to 0.22uF then retake the below waveforms

I could not replicate the exact waveform, but here is a similar waveform with the time measurement shown:

And here is the CS pin with a smaller scale. I could not get a waveform of value at 100mV/div though.

Do you mean capture a waveform of CS, RT/CT and Gate with (1) just R408 removed, and (2) R408 removed and C423 = 0.22uF? 

Hi,

Yes try these to see how the waveforms look like.

Here is the first waveform with R408 removed:

And the second with R408 removed and C423=0.22uF

Hi,

Please add COMP waveform along with gate, CS and RT /CT

- with R408 removed

- with R408 removed and C423=0.22uF

Unfortunately I do not have enough differential probes to measure all four at a single time. These were taken with R408 removed and C423=0.22uF with a 1.5A load applied

Here is gate, COMP, and CS

Here is gate, COMP, and RT/CT

Here is gate, RT/CT, and CS

Are the components too far from the IC pin? If that causing the noise? 

How can the a layout be improved? 

Hi,

Can you show how COMP pin and FB connection from the opto coupler? Also show how opto coupler connected to the output voltage on the layout?

Where is your Q400 and how its drain loop, gate loop connected on the layout?

This is the connection for COMP and FB on the optocoupler

And then this is how the opto is connected to the output

And here is the Q400 layout

Hi,

Can you provide the whole PCB layout of this converter then draw blocks of each you show - I need to know their locations and nearby things - individual portion cannot help to decide if ok.

Here is the whole layout: 

This is the IC portion: 

This is the MOSFET: 

This is the side of the opto that goes back to the IC via long traces: 

And the side of the opto on the secondary side of the transformer with the 24V output: 

Did you need me to zoom in on any other sections? 

Hi,

The optocoupler is too far from the IC. It looks this is the reason the COMP pin very noise.

It looks you can move the IC to the arrow location so to help to reduce the COMP noise which can help to solve the pulse fluctuation issue you have.

It looks to me with the current layout you have, it  is difficult to help resolve the issue.

Understood, thank you!

Do you think the noise due to layout would also impact the max values I am measuring for VREF, CS, FB, RT/CT, and COMP? All of which are over the max value indicated in the datasheet. 

This is what I am measuring currently with a 2.7A load: 

VREF = 12.56V(max), 5.04V(rms)

CS = 12.6V(max), 0.5V(rms)

FB = 13.56V(max), 2.69V(rms)

RT/CT = 12.2V(max), 0.43V(rms)

COMP = 12.6V(max), 3.96V(rms)

The rms values are all within the limits and what I expect them to be, but the max value is concerning me because I don't want to damage the IC. So would the noise cause these spikes? Should I still be concerned about these high spike values?