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TPS62872-Q1: Low-side FET negative current limit, DC

Part Number: TPS62872-Q1
Other Parts Discussed in Thread: LM61440,

Hi Team,


Can you help me  identifying the difference between Low-side FET negative current limit and Low-side FET valley current limit .

Also, does high side switch current limit and low side switch current limit refers to MOSFET 's current capability(maximum drain current)?\

  • Hello Reema,

    Thanks for reaching out to us.

    The low-side FET negative current limit has the similar function with low-side FET valley current limit (just different terminology). Please refer to the attached .ppt file to show the low-side FET negative current limit during short circuit or over current protection.

    Furthermore, the high-side and low-side FET current limits are not directly correlated to Mosfet's maximum current capability. The FETs current limit is set to ensure that converter does not trigger over-current protection across Vin, Vout, Fsw, inductor and IC process variations at full load conditions with enough margins. Typically, the Mosfet's current capability can be attributed to the amount of current the device can handle without exceeding the maximum junction (Tj) and does not cause any structural/functional failure to the IC.

    I hope I was able to address your queries.

    Short ckt. protection_Foldback_Cycle-by-cyle.pptx

    Best regards,

    Excel

  • Hi ,

    Thanks for your response.

    I would like to get a clarification on one more point.

    In another datasheet LM61440 , mentions about Low side switch current limit and negative current limit. Can you please help me finding out the difference.

    Also, does negative current limit and negative valley current limit same?

  • Hello Reema,

    The low side switch current limit (IL-LS) parameter on LM61440 is similar with the Low-side FET negative current limit of TPS62872-Q1. On the other hand, the negative current limit (IL-NEG) pertains to the current that passes through the low-side FET from SW to GND. This event can occur when inductor current falls below 0A while the low-side FET is still ON. Please refer to the diagram below for details.

    Best regards,

    Excel

  • Hello Reema,

    Jiust a gentle reminder. If you don't have further queries, can you kindly close the thread?

    Thank you.

    Best regards,

    Excel

  • Sure. Thank you for your support