LP87523-Q1: LP87523 CLKIN deterministic nature

Hi Mathieu,

The LP87523 CLKIN pin allows for connection to an external clock, for such a scenario you are describing, although the nominal frequency should be between 1 MHz and 24 MHz. This can also be read in the datasheet by searching for the term 'clock', and also in section 8.3.2 on page 21 of the datasheet.

Thanks,
Field

Thanks! that's what I understood indeed.

However that's not my question: is the "clock to mosfet switching time" delay deterministic?

I want to make sure that if I use the same phase-shifted clock to multiple LP87523-Q1 then each LP87523-Q1 will switch at a different time.

Hi Mathieu,

If each LP87523 is connected to a ''different'' CLKIN signal, then they should switch with the difference according to their corresponding signal. Which I believe is what you are asking?

If they are connected to the same CLKIN signal, then they should switch at the corresponding input signal. 

Thanks,
Field

Hello Field,

Thanks a lot for your answer!

My question is about the "should" in your sentence, I need this to be a certainty to make sure to be able to implement interleaving...

Hello Field,

Sorry for being persistent, but where in the datasheet do you see the relationship between the clkin and the internal mosfet control signal? I would expect a timing diagram of some sorts :)

Hi Mathieu,

No need to apologize. I do not know why the team did not include such a thing in the datasheet during initial testing or development, but perhaps the sync clock functionality section is meant to be visually descriptive but with no visual. 

Thanks,
Field