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TPS6594-Q1: overcurrent protection delay time

Part Number: TPS6594-Q1

Hi Team,

PN is TPS65941213. Customer is testing a the overcurrent performance of this device. We see for BUCK1+2+3, when OC is triggered, there will be about 2.5ms CC status then system shutdown, while for BUCK4, it is about 30us. I think 30us matches the specs in EC table. But why BUCK1+2+3 has 2.5ms CC status?

B&R

Lijia

  • Hi Michael,

    Any good news?

    B&R

    Lijia

  • Hello Lijia,

    How are they executing this test?

    The 30us that you have pointed out is from detection to interrupt or PFSM trigger. If all interrupts are cleared before the test, they should see no more than 30us between the limit hits and the nINT pin goes low signaling the fault. 

    For the TPS65941213 specifically, BUCK123 and BUCK4 are in different power groups. BUCK123 is in the SOC power group so the PMIC won't shut down but just go to the SOC_PWR_ERR state / MCU Only state. BUCK is in the MCU power group, so PMIC will shut down. 

    In both scope captures I see that the current is limited right away according to their per phase current limit settings.

  • Hi Michael,

    Customer use a electronic load to sink the current of BUCK1/2/3 and BUCK4 seperatly. These two test are done with seperate powercycle. I understand that BUCK1/2/3 error trigger PFSM to MCU only mode. But It at leaset BUCK1/2/3 is powered down. My quewstion is why there is a 2.5ms delay before BUCK1/2/3 shutdown?

    B&R

    Lijia

  • What interrupts are read from the PMIC?

    At 2.5ms does everything shutdown or just BUCK123?

    For the TPS65941213 Buck/LDO ILIM interrupts do not effect FSM triggers. (snapshot from PDN-0C user guide below). However the voltage drop will cause an SOC_PWR_ERR_INT an BUCK1_UV_INT. The PMIC will then execute the SOC_PWR_ERR sequence. BUCK123 turns off at the 2.5ms mark of that sequence.