LMR14020-Q1: Cout capacitor stability consideration

Hello Christian,

A 47uF MLCC capacitor will experience some derating due to DC bias effects with voltage applied across the component. This makes the effective output capacitance smaller than the nominal 47uF value.

As such, if the calculation calls for 21.6uF, then I would normally pick a combination of MLCC that results in double this value. This ballpark approach will account for derating and still have adequate capacitance for stability purposes.

Regards,

Jimmy

Hello Christian,

Usually the output capacitance is selected for your desired load transient performance (equation 14) than stability given that the prior will always need more capacitance than the later. 

There is nothing preventing you to go even higher such as 2 x 47uF on the output capacitance. 

However I would be cautious of too much capacitance as that may slow down the responsiveness of the device to load transients given that large output capacitance, usually I've seen 600uF+ slowing down the loop response but most common applications do not have that much capacitance on the loading circuit.

Do you have a particular concern in your design for the output capacitance here?

Regards,

Jimmy

Hello Jimmy,

Thanks again!

I'm designing a 5 V source with this IC, and I'm using the datasheet and the webench tool, but I had not so clear the  design criteria about the Cout. But now it is clearer.

Best regards.