Other Parts Discussed in Thread: TPS7B7702,
Tool/software:
Hi,
According to the datasheet, when TPS7B7702 is used for the dual-channel antenna LDO application, if one channel is shorted-to-ground, the temporary dip in the Vin can trigger the reverse-current detection fault and other channel will be latched off.
1. Now we have a 50uF inoput capacitor, and Vin=Vout1=Vout2=12V. When Vout1 is short to ground, Vin has a temporary dip of about 0.6V, triggering reverse-current fault in channel 2 and causing it to shut down.
According to the datasheet's provided output current and corresponding dropout voltage, the on resistance is approximately 500mV/100mA=5Ω, and the reverse current can be calculated as -0.6V/5Ω=-120mA ( <-40mA, Irev_typ). Does this mean that to avoid this false trigger event, Vin_dip needs to be less than 40mA*5Ω=200mV? How large of an input capacitor is needed to prevent this fault?
Ps: It was found that even a 400uF capacitor could not prevent this from happening. According to the calculation of ic=C*du/dt, the required capacitor would be extremely large and cannot be applied in the design.
2. When the output is held short-circuited, TPS7B7702 will continues to remain corresponding channel on, and the output current is limited. Dose this mean the internal MOS remains on? and the input voltage will remain low impedance to ground through the on-MOS ? If so, why doesn't Vin keep decreasing? What happens in that "temporary dip"?
Thank you!