• State Resolved
  • Locked Locked
  • Replies 9 replies
  • Answers 1 answer
  • Subscribers 62 subscribers
  • Views 156 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

TPS38700S-Q1: Interrupt behavior of the component

TPS38700S-Q1: How to control GPOx

Tom Levisse
Prodigy 40 points
Part Number: TPS38700S-Q1
Other Parts Discussed in Thread: TPS38700-Q1

Tool/software:

Hello, 


I wish to use GPOs on the TPS38700s-q1 with a tps389006s-q1.

How can I control them? In the datasheet there is only the register GP_OUT (0x25) that controls GPO9 to GPO12

Where is the register that controls GPO7 and GPO9?

Regards,

Tom LEVISSE

  • 0
    TI__Expert 5870 points

    Hello Tom, 

    I will have to check with our team as to why these registers were excluded from the datasheet, I will provide an update by 6/7. 

    Regards, 

    Oscar Ambriz 

  • 0 in reply to Oscar Ambriz
    Prodigy 40 points

    Hello, Could you tell why we can specify the sequence order of the GPOs ? Even if there are not controled with SYNC ?

  • 0 in reply to Tom Levisse
    TI__Expert 5870 points

    Hello Tom, 

    In regards to your previous questions the team has informed me that the GPIO8 and GPIO7 are located in register 0x30. This is a typo and will be corrected on the next datasheet revision. The following describes the register:

    7 6 5 4 3 2 1 0
    GPIO8 GPIO7 RSVD RSVD RSVD RSVD RSVD SSTEP

    Can you elaborate on what register you are referring to when you say "specify the sequence order of the GPOs "?

  • 0 in reply to Oscar Ambriz
    Prodigy 40 points

    Hello, thank you for giving me this information ! Yes, I am talking about the registers PWR_EN[12:1] in which you can specify the power_up and power down sequence order. How is it controlled with the GPOs ?Hello, thank you for giving me this information! Yes, I am talking about the registers PWR_EN [12:1] in which you can specify the power_up and power down sequence order. How is it controlled with the GPOs?

    Regards,

    Tom LEVISSE

  • 0 in reply to Tom Levisse
    TI__Expert 5870 points

    Hello Tom, 

    Thank you for clarifying the register. Registers PWR-EN (0x33 to 0x38) control the sequence slots of the corresponding enable pin. For example, EN3 and EN4 are set to slot 2 for power up this means that they will come up at the same time and after slot 1 which is occupied by EN1 and EN4. This is shown in the attached images. Note the user can set the slots to what they please, for example the user can set EN1 to slot 1, EN2 to slot 2, ... and so on. Note that the sequence order does have to be consecutive the user can not set a slot order of 1,3,6 for example. The slot order will need to be set as 1, 2, 3 , 4, 5, 6 and the user will select whether they want to set EN pins to same slot are have each EN output set to a distinct slot. 

  • 0 in reply to Oscar Ambriz
    Prodigy 40 points

    Hello Oscar, 

    Thank you, but my question was more about the registers PWR_EN[7:12] 0x39 to 0x3E (which means the GPOs) 

    Does it mean that they can be assigned to a sequence order as the ENx pins?

    Thanks for your time,

    Regards,

    Tom LEVISSE

  • 0 in reply to Tom Levisse
    TI__Expert 5870 points

    Hello Tom, 

    In the register map shown in TPS38700s-Q1 datasheet I only see registers 0x33 to 0x38 referenced, as shown in the image below. Can you please point me to where you see 0x39 to 0x3E referenced in the document? 

    Regards, 

    Oscar Ambriz 

  • 0 in reply to Oscar Ambriz
    Prodigy 40 points

    Hello Oscar, 

    It is not shown in the register map table, but if you look in detailed register Table 8-22 (page 34) here it is mentioned. 

    Regards,

    Tom LEVISSE

  • +1 in reply to Tom Levisse
    TI__Expert 5870 points

    Hello Tom, 

    This is a typo carried over from the TPS38700-Q1 family datasheet, please ignore the reference to the additional registers. We will fix this upon the next datasheet revision. 

    Regards, 

    Oscar Ambriz