This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LM7481-Q1: Power sources priority and redundancy - circuit design

Part Number: LM7481-Q1
Other Parts Discussed in Thread: LM7480-Q1, LM74722-Q1, LM74800-Q1

Tool/software:

Hello TI experts,

I want to design a circuit that receives two different power sources as inputs and performs prioritization of the power path to the load.
The first power source is a 55V power supply.
The second power source is a 12-cell battery (42V-50.4V).
I plan to use two ideal diode controllers to control and prioritize the power path (as shown in the article "Six System Architectures With Robust Reverse Battery Protection Using an Ideal Diode Controller" - Design #6).

There is an external controller that sends an "Enable/Disable" signal to the ideal diode controllers to turn the load on and off according to a certain logic.

As long as an "Enable" signal is received in the ideal diode controllers:
The circuit needs to deliver power to the load from the power supply as long as the power supply is connected to the circuit.
Once the power supply is disconnected, the circuit should route the power to the load so it comes from the battery.
When the power supply is reconnected - the circuit has to switch back the power path to the load so that it comes again from the power supply and not from the battery.
Switching must be fast enough to keep the load alive during the change of the power path to the load.

As soon as the "Disable" signal is received in the ideal diode controllers - all the MOSFETs have to close to completely turn off the load.

Note: There is one "Enable\Disable" signal coming from the external controller.
When the "Enable\Disable" signal is sent - both of the ideal diode controllers receive it, so as long as the "Enable" signal is sent, both of the ideal diode controllers receive it at the "EN" pin but prioritization of the power path to the load should be done according to what I described above.

Conceptual scheme of the architecture:

Additional information and questions:

When the system (load) will be fed through the power supply path the continuous current will not exceed 5A (for a long time) but when the system will be fed through the battery path the continuous current will reach approximately 250A (for about 40 seconds).

Because of the high current passing through the path of the battery to the load, I will have to connect to MOSFETs Q3 and Q4 several more MOSFETs in parallel.
To turn on and off fast enough several MOSFETs that are connected in parallel, I will need a device with the highest gate drive strength.

  • I know I can design the circuit with the LM7481-Q1 instead of the LM7480-Q1 shown in the schematic above for higher gate drive strength,
    but can the LM74722-Q1 be used in this architecture for even higher gate drive strength?
    I did not find any reference design for this type of architecture using LM74722-Q1, I would appreciate it if you could attach a reference design if there is one...

The power path from the power supply to the load is a low current path and the MOSFETs Q1 and Q2 are smaller and do not require parallel connection to additional MOSFETs as is the case with MOSFETs in the power path from the battery to the load.

  • Doesn't the difference in MOSFETs between the two paths mean that the battery path MOSFETs turn ON slower than the power supply path MOSFETs turn OFF, causing the system to sense the lack of power source and momentarily turn off while switching between the two power sources?
  • Will the situation be as I described? Is there a way to solve this problem?

Another thing:

I don't really need features like OVP \ UVLO \ BATT_MON
I just need to control the ON and OFF state of the system using the "Enable/Disable" command to the ideal diode controllers
And when the ideal diode controllers are "Enable", then the default voltage source will be the power supply, and only when the power supply disconnects does the battery connect to the system (of course fast enough so that the system does not feel the change of the voltage source).
In addition, I also need reverse current protection so that no current flows from the power supply to the battery or from the battery to the power supply.

I would appreciate receiving guidance or some design reference,
are there things that are very essential to implement or things that are unnecessary to implement?
Are there things I should pay attention to when designing the circuit?
Are my requirements from the circuit even feasible?
Any information you can give that will help me design the circuit more correctly would be greatly appreciated

Thank you very much!

Niv

  • Hi Niv,

    Welcome to E2E!

    You surely need features like OVP/UVP. Please refer to this document below which explains how to use priority power MUXing. 

    Priority Power MUX using Ideal Diodes in Automotive Zonal Modules

    I would recommend you use LM7481-Q1 for this application. The parallel FETs indeed will take longer to turn-on but to tackle that, we have a solution by driving the blocking FET with CAP pin. This way the turn-on time will be minimum.

    Regards,

    Shiven Dhir

  • Hi Shiven,
    Thank you for your response.

    I have already reviewed the document you attached, but it doesn't provide an exact solution to my requirements.

    I understand that I need the OVP function to ensure that the power path from the battery will be OFF when the power path from the power supply is ON and when the power path from the power supply disconnects, the OV pin of U2 will be pulled down, and U2 will exit OVP mode so that the power path from the battery turns ON.

    However, I don't need the UVP function; I want to use this pin for the Enable/Disable function to turn ON and OFF the output voltage to the load.

    When both U1 and U2 receive an Enable signal, will the prioritization of the power path depend solely on the OVP function?

    Additionally, from what I understand from you, will the LM7481-Q1 combined with transistor Q5 and by driving the blocking FET with CAP pin provide me higher gate drive strength than the LM74722-Q1?

  • Hi Niv,

    Your understanding is correct on OVP. Regarding UVP, yes you can use it as EN signal also.

    When both EN signals are high, prioritization will happen solely on OVP.

    Regarding the gate drive strength, yes LM7481-Q1 combination will have stronger drive as LM74722-Q1 has 50uA.

    Here, point of interest is the gate drive of blocking FET as this FET only influence the time of "no power"

    Regards,

    Shiven Dhir

  • Hi Shiven, thanks for the response.

    Based on your answer, I started the schematic drawing and the component selection. I’m attaching a PDF file of the initial schematic.

    I chose to use Infineon Power MOSFETs, part number IQD020N10NM5CGATMA1, for all the MOSFETs.

    As you can see in the drawing, only one pair of back-to-back MOSFETs is present in the power path from the power supply, where around 5A will flow.
    In contrast, in the power path from the battery, where around 250A will flow, I had to connect 5 pairs of MOSFETs in parallel.

    I would appreciate your feedback on the schematic so far.
    Additionally, to generate a higher current for charging the GATE of the MOSFETs in parallel, I want to implement the addition of the NPN transistor. I would appreciate help in selecting the appropriate transistor and the resistor and diode connected to it.

    I don’t think I fully understood the potential at the CAP pin or the current it will push to perform the calculations needed for choosing the transistor and resistor.

    Thanks a lot,
    Niv

    4130.Schematic Prints.pdf

  • Hi Niv,

    We have a Pspice model of this controller available to TI.com which you can run in Pspice for TI. With the model you can design the resistor value which will decide the turn-on of the MOSFET.

    Regarding the rating: 

    1. The voltage rating of Q5 transistor should be > [VAUX(MAX) + 15V]
    2. The value of R5 resistance is depends on how much current you want to inject into the HGATE,

      • With R5 = 0 ohms, the current injected would be around 2.7 mA
      • If you want to reduce the current injection into HGATE to slow down the turn on of the HFET, you can increase the value of R5. For example, if you want to limit the max current injection into the HGATE to 500 uA, then R5 = [(VAUX(max)+15V)/500 uA]
    3. Rating of diode D2 should be > VPRIM(max)

    Regards,

    Shiven Dhir

  • Hi Shiven, thanks for the response.

    1. The voltage rating of Q5 transistor should be > [VAUX(MAX) + 15V]
      When you say voltage rating of Q5, do you mean collector-emitter breakdown voltage / collector-base breakdown voltage / emitter-base breakdown voltage?

    2. The value of R5 resistance is depends on how much current you want to inject into the HGATE
      How do I calculate how much current I need to inject into HGATE?
      What will be the Gate Drive Voltage that the MOSFET will receive when it is connected to the emitter of Q5?

      With R5 = 0 ohms, the current injected would be around 2.7 mA
      In the LM74810-Q1 datasheet, I(CAP) is specified as 3.8mA. Could it be that the picture you attached is related to another device?

    3. Rating of diode D2 should be > VPRIM(max)
      Did you mean D3 (or Dx in my schematic drawing)?
      When you say voltage rating of D3, do you mean to the diode reverse voltage (V_R)?
      What type of diode should it be?

    Updating:
    VPRIM(max)=53V
    VAUX(max)=50.4V

    I would be very grateful if you could review everything and provide more detailed responses.

    Thank you very much!

  • Hi Niv,

    1. It is the VCEO (collector-emitter)

    2. Current to be injected into HGATE depends on system requirements. Higher the current, faster the switching of HGATE. HGATE will be driven to around 10V VGS. Apologies, the attached picture is of LM74800-Q1.

    3. I mean Dx in your schematic. Rating that I referred to is V_R. It can be a general-purpose switching diode.

    Regards,

    Shiven Dhir

  • Hi Shiven, thanks for the response.

    1. It is the VCEO (collector-emitter)
      OK, Thank you!

    2. Current to be injected into HGATE depends on system requirements. Higher the current, faster the switching of HGATE. HGATE will be driven to around 10V VGS.
      I understand what you are saying but let me ask this more correctly
      - how do I calculate the MOSFET turn-ON time and turn-OFF time?
      - What parameters do I need to know for the calculation? (I_gate / Vgs / Qg / Ciss), what equation should I use?
      I want the on and off times of the MOSFETs in both power paths to be as synchronized as possible so that the load does not feel the change between the paths and the transition between the paths will be as smooth as possible.

    3. I mean Dx in your schematic. Rating that I referred to is V_R. It can be a general-purpose switching diode.
      OK, Thank you!
  • Hi Niv,

    You can calculate the turn-on time by I=cdV/dT where c is the total Ciss of the FETs and dV = 10V

    Turn off time can be calculated similarly, pull down current is mentioned in the datasheet.

    Regards,

    Shiven Dhir