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BQ76952: Powering BAT from the PACK+ side

Part Number: BQ76952

Tool/software:

Hello

This extends James Tyou's question.

Some newer battery chemistries are safe to discharge to 0 volts; a similar problem to James' work with supercapacitors.

I'd like to allow these cells to 'bootstrap' up to the voltage that the BQ requires at the BAT supply pin.

I have modified the EVM circuit to also supply the BAT pin from the CD net through a diode (see below)

I was declined access to the Functional Safety analysis and no reason provided. Can TI provide advice if this connection would fail the analysis ?

I have a 3000W TVS at the pack pins with a clamping voltage below the discharge FET Vdsmax. A transient can still drive the CD pin up to that clamping voltage (less the FET diode drop) which D2, R1, and C1 must survive. I am unsure what the effect might be on functional safety.

All the best
Harry

  • Hello Harry,

    This previous forum post, Documents to Proceed with UL2271 Certification, can help explain how to get functional safety documentation for the BQ76952 if desired. Did you follow these steps before requesting access?

    Best Regards,
    Alexis

  • Hello Alexis

    I did. Under instruction from TI, we transacted an NDA and my request was declined.

    My initial post above is therefore to ask TI to give me feedback on the modification I am proposing; if someone could answer that please.

    If TI support can offer advice on rejection of our FMEDA access request, it may be better to have a telephone conversation. Please allow for the Australian time zone.

    Thank you and all the best
    Harry

  • Hello Harry,

    When did you request access previously? There were some changes made in the process, and it is recommended that you try again.

    I will double check with another team member regarding your question.

    Best Regards,
    Alexis

  • Hello Alexis

    I have made a Friend request so I can send some details with a PM.

    Thank you and all the best
    Harry

  • Hello Harry,

    Thank you for your patience with this process. I have accepted your Friend Request.

    Best Regards,
    Alexis

  • Hello Alexis or another

    We have resolved the side issue of access for the FMEDA (thank you) so I'd like to ask if engineering have a response to my topic question ?

    The forum interface has set this to "TI thinks this is resolved". I am waiting for feedback on the change.

    My initial consideration was exposure of the BQ to external transients but I'd also welcome feedback on any other risks to the BQ with this change.

    Thank you
    Harry

  • Hello Harry,

    After reviewing it with my teammates, this process would have the CHG pin connected to the PACK pin, which if the BAT voltage is greater than PACK voltage, the CHG FET can turn ON when it is not desired too. This is not recommended.

    Best Regards,
    Alexis

  • Hi Alexis

    I puzzled about the CHG pin reference in your reply until I figured out that the schematic contains parts that are not assembled onto the EVM PCB. I also re-used the diode designator when I snipped and pasted the modification and then provided that in a circuit fragment. Apologies for any confusion from this.

    Attached are the original schematic, now amended, with the diode I want to insert; now D17. It has a rounded rectangle around it in red with the text frame: ALTERNATE BQ BAT PIN SUPPLY ADDED.

    The second schematic is as-assembled using the TI supplied Altium variant 001. When you select and print a variant, it shows the NotFitted components with a red cross but also prints circuit wires in grey which is inconvenient to read but visible.

    So my plan is to diode-OR a BAT supply from either the existing BAT+ net or from CD net where CD is the junction between the main series FETs. So CD will be a permanent voltage which is the higher of PACK+ or fused BAT+ (FBAT net) less the main FET body diode forward voltage.

    That way, if the battery (or supercapacitor) is at zero volts then I can get the BQ alive by applying PACK+ voltage.

    There are complications with pre-conditioning the 0 volt battery but this is out of scope for my question here.

    I have always assumed that powering the BQ only from the BAT+ side was to protect the BQ from external transients at the PACK+ pin (for survival of the BQ). That is why I sought a second opinion about what I might be exposing the BQ to. I have a large TVS across the PACK terminals at appropriate clamp voltage but (unlike the battery as a supply) any rising transients at the PACK+ pin will be delivered to the BAT pin up to the TVS clamping voltage; albeit with rise time limits from the R1-C1 filter and voltage support for the BQ.

    I had considered that a transient may cause CP1 to fall relative to BAT but I assume that is happening for pack short circuit conditions and PACK+ transients anyway.

    I am throwing the question to TI to say "am I missing anything here" because it is a significant departure from the reference operation.

    Let me know if you have any other things I should consider.

    Thank you and all the best
    Harry

    BMS0298_Amended.pdf

    BMS0298_Amended_AsAssembled.pdf

     

  • Hello Harry,

    Apologies for the confusion caused by my incorrect statement there. To clarify what I meant to say, the CHG pin actually connects to BAT+ when the CHG FET is OFF.

    By connecting the CD point to BAT+, if the CHG FET is OFF and the PACK has higher voltage than the BAT+ voltage, the CHG FET will turn ON. I see that this is what you want to occur if the battery/supercapacitor is at 0V.

    The concern is when the battery cells trigger COV and wants to turn off the CHG FET to stop overcharging, but then due to the PACK+ voltage being larger than the BAT voltage, the CHG FET will remain ON and continue charging the overcharged cells. 

    Best Regards,
    Alexis

  • Hello Alexis

    Of course.

    Thank you. Your earlier statement wasn't incorrect. I had focused on the BAT pin as "Primary power supply input pin" (from the datasheet) and missed that, to drive the CHG FET gate to an off state, driving the CHG pin to BAT pin potential with an internal switch means reverse current is possible when BAT rises.

    In hindsight, this is described in the Multiple FETs App. Note, sluaa09a.pdf, Figure 7-3. CHG Driver Turn-Off Current Path.

    I will need to reconsider the bootstrapping feasibility.

    All the best
    Harry