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LM3102

Syed Bilal Ul Haq
Prodigy 50 points
Other Parts Discussed in Thread: LM3102

We did made some samples using the LM3102 part for wide range Input (8-36V) and fixed Output (5V). Our Circuit has a Super Capacitor ( to provide required burst current) . The overall design works good but the Inductor (15u  L_WE1050) is becoming noisy. Attached is my circuit design. Please review and let me know soon how should I knock off the Inductor noise. I did try to change the switching frequency by changing the RON Resistor value from 102k to 90k and 50k but the noise still exist. The noise was decreased a bit when I connected a larger Capacitor at VCC. Can you provide me the details of how to suppress this noise.

  • 0
    TI__Genius 15810 points

    Hello Syed,

    It looks like your file did not make it through. You might have to resend it. Usually if there is no issue with the design and the circuit is noisy then it is usually because of an un-optimized layout. Your note about adding a larger Vcc cap to reduce noise further indicates that.

    The most important thing in an SMPS is to keep the high frequency current loop on the board very compact. The high frequency loop in a buck circuit would be the one between the input cap, the high and the low side FET. To make that loop compact you should make sure the path from Cin ground to PGND is as short as possible. I would further advise you to make sure you have complied with the basic instructions on PC board layout on page 15 of the datasheet. If you want, you could also send us your board layouts for perusal. Gerber files or layout images would do.

    Regards,
    Akshay 

  • 0 in reply to Akshay Mehta
    TI__Genius 15810 points

    Hello Syed,

    You mentioned that those were confidential files and since this is a public forum, I have deleted your post after downloading the files for my perusal. I hope you will not object. In the future if you are required to share any confidential material with any TI engineer, you should email them directly. 

    I have a few remarks/questions regarding your schematic and layout after going through them. They are as follows:

    1) On the schematic you have a diode D6 that goes from output to ground. Why do you have that?

    2) Is the 68uF cap designated as C14 your super cap?

    3) On your layout, there are a few issues that you could resolve and which should help. The first one to do is to remove all the thermal reliefs you have on the PGND and the IC power pad connection. Adding thermal reliefs is not advised because thin traces in high current path add more inductance and consequently noise. You should also remove the relief connect at the VCC ground. 

    4) You also should not have the high frequency current loop go through vias as far as possibl. These again add some more inductance in the path and create more noise. The cathodes of Cins are connected through such vias to PGND.

    5) The trace from bootstrap pin to C15 could be a little wider

    6) It is better to run long traces to low impedance nodes and shorter traces to high impedance nodes. Your feedback trace is long and Vout sense from Vout node to upper feedback resistor is basically right next to the inductor. This enables noise coupling on the FB trace very easily. It is advantageous to keep the feedback resistors very close to the FB pin and make long run from Vout to upper feedback trace while keeping is away from the inductor.

    These are some quick remarks. You should refer to the datasheet as I mentioned in the previous post for more pointers. I hope this helps.

    Regards,
    Akshay 

  • 0 in reply to Akshay Mehta
    Prodigy 50 points

    Hi Akshay,

                      Thanks for the quick reply. I didn't had your Email so I attached the docs. Thanks for removing them from the post. Following are my answers to your questions highlighted in yellow:

     

    I have a few remarks/questions regarding your schematic and layout after going through them. They are as follows:

    1) On the schematic you have a diode D6 that goes from output to ground. Why do you have that?

    A1) D6 is used as a TVS Diode in the event that the LM3102 Outputs any thing above 6V is pulled down to GND and the other circuitry is protected.

    2) Is the 68uF cap designated as C14 your super cap?

    A2) No C14  68uF cap was used from  the LM3102 Design Bench for (8-32V) Wide range Input Application. The Cap C6 1F is the Super Cap (on pg 2).

    3) On your layout, there are a few issues that you could resolve and which should help. The first one to do is to remove all the thermal reliefs you have on the PGND and the IC power pad connection. Adding thermal reliefs is not advised because thin traces in high current path add more inductance and consequently noise. You should also remove the relief connect at the VCC ground. 

    A3) Shall make the changes and provide the feedback.

    4) You also should not have the high frequency current loop go through vias as far as possibl. These again add some more inductance in the path and create more noise. The cathodes of Cins are connected through such vias to PGND.

     A4) Shall make the changes and provide the feedback.

    5) The trace from bootstrap pin to C15 could be a little wider

    A5) Ok

    6) It is better to run long traces to low impedance nodes and shorter traces to high impedance nodes. Your feedback trace is long and Vout sense from Vout node to upper feedback resistor is basically right next to the inductor. This enables noise coupling on the FB trace very easily. It is advantageous to keep the feedback resistors very close to the FB pin and make long run from Vout to upper feedback trace while keeping is away from the inductor.

    A6)  Shall make the changes and provide the feedback.

    I shall  refer to the datasheet as you mentioned in the previous post for more pointers. Let me work on it and shall give you the update regarding whether it reduced the noise or not.

    Thanks again for your cooperation!

    Regards

    Syed Haq

  • 0 in reply to Syed Bilal Ul Haq
    Prodigy 50 points

    Hi Akshay,

                       One more problem that I am facing is that we are using a  TPS3808G01 (Supervisory Circuit IC) which is used for time delay purpose and to handle inrush current. But during the 10ms Transmission mode of the Modem the SWR_PWR  (output of from the LTC3202) which is suppose to output 5V is having a spike/glitch for that  Transmission mode where the current consumption rises from 30mA to 160mA. Due to that glitch the Reset of the TPS3808G01 is being asserted low and the Transmission is failing. I am thinking to use a 0.1uF Capacitor across the Voltage and reset line of TPS3808G01 so that the spike is mitigated. Please let me know is there anu other way to get rid of the spike/glitch at the transmission mode.

    Regards

    Syed Haq

  • 0 in reply to Syed Bilal Ul Haq
    TI__Genius 15810 points

    Hello Syed,

    Unfortunately I am not familiar with the TPS3808G01. I would advise you to repost the question in the appropriate forum. That ways you will get the answer as soon as possible.

    Regards,
    Akshay