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TPS25910 questions

Other Parts Discussed in Thread: TPS2590, TPS25910, TPS3700, TPS2592BL

Hi guys,

I have a couple of questions that were broght up by a customer of mine:

1. Can you verify that the thermal pad should be electrically connected to Ground?  Neither the customer or I found that documented in the datasheet, and want to verify that the intention is that the Thermal pad be electrically connected to ground.

2. Can you verify whta happens to the OUT pin and the GATE pin when the device has a VIN below 3V?  We are trying not to turn things on unintentionally.

Thank you,

  • 1. The thermal pad should be connected to a heatsink of some kind for thermal performance. Usually, the most convenient way to do this is by connecting to a ground plane using vias from the thermal pad (see note 7 under the thermal information data).

    2. When you mention VIN=3V, are you referring to the IN pin UVLO (2.6V to 2.9V for rising Vin)? GATE is pulled to GND when Vin < Vuvlo and OUT will follow IN + Vd where Vd is for forward drop of the internal FET body diode (assuming that the external blocking FET is not used).

  • Good morning Eric,  I am the customer.

    1. I got the bit about tying the thermal pad to a large copper area on the board, but there was just no indication in the data sheet about what the pad was connected to internally.  It could have been IN or OUT.  It would be nice if the data sheet indicated that the pad was internally connected to GND.

    2. I am using the external blocking FET and I'm not so much concerned about the power up conditions as I am about the power down conditions.  We have to contend with a very slow decay of the input power and I want to make sure the device will not lose its mind as it moves slowly from 2.5 to 0.0 volts.

    Thanks for your reply.

    Best regards,

    Mike Boyle

  • Hello Mike,

    I agree about the datasheet being unclear with regard to the power pad and we will get this fixed. FYI, TPS25910 is a descendant of TPS2590 and TPS2590 has a section on the PowerPad in the Layout section (pg 15).

    For the slow power down, I'd recommend using a comparator (discussed on pg 14) to de-assert ENb before the input voltage dips below UVLO (2.9V max). Then the blocking action will work as desired. But, I also don't expect adverse behaviour as TPS25910 input voltage falls from UVLO to 0V.

  • Hello Eric,

    I'm back on this project and I am planning to use a comparator as the datasheet suggests.  Ths 25910 feeds the board supply that has about 10,000 uF of input capacitance used for "ride thru".  This power rail is named 5V_Local and I plan to isolate this from the input using the blocking scheme of the datasheet.  I am planning to power the comparator from the same Vin as the 25910 (that will be 5V nominal) and using Vin/2 for the inverting input of the comparator with 5V_Local/2.2 for the non-inverting input of the comparator.  This should disable the 25910 as soon as Vin begins to sag 120mv or so below 5V_Local.  My concern is that fairly quickly the VCC of the comparator will fall below the non-inverting input and I don't want to damage the comparator or cause misoperation that could re-enable the 25910.  Any thoughts on this?  Has TI actually implemented this scheme and do you have a tested example?

    Thanks for your help.

    Best regards,

    Mike Boyle

  • Hi Mike,

    I don't expect any damage or mis-operation issues when using the TPS3700 in this fashion. TPS3700 has a wide VIN and 5V operation is well within that range. TPS3700 output is open drain so you will need a pullup on the output to 5V (TPS25910 input). Connect this to ENb of TPS25910. If this was used in a 12V system, you would need a zener from ENb to GND as ENb is only rated to 7V max.

    Another option/device that also supports blocking as well as VIN clamping is TPS2592Bx (or TPS2592Ax for 12V applications). This is a new eFuse type part and the "comparator" is integrated into the device. The TPS2592BL EVM is setup for the blocking application and works well.