• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 62 subscribers
  • Views 505 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

bq77908A: Questions about charger detecting and CHGST connection

John M
Expert 2135 points
Other Parts Discussed in Thread: BQ77908A

We have an application for a bq77908A-protected pack that would use both maintenance (topping off the pack) and current taper limit (stop charge at 0.1C amps) chargers. Both charge and discharge protection FETs will be used, in series.

We're forced to have a two-pin pack only, no third charger detect pin would be available. We were going to set balancing to be on at all times but had a couple of questions. 

- Is there a workaround to detect a charger being connected without a third pin on the pack? We can't think of one but was hoping TI might have some ideas.

- What would be the recommended method of connecting the CHGST pin if we're not detecting the charger? Pull up via resistor divider to PACK+/BATT+? Or better to pull up to VREG to minimize possible electrical noise or ESD on the pin, perhaps with a series resistor?

- The operating environment for these packs is extremely noisy (electrically). Do you recommend putting a small capacitor on the CHGST pin?

  • 0
    Expert 2135 points

    Another question...

    If we have a two-pin pack (PACK+ and PACK-) with bq77908A protection, i.e., no separate charger detection pin, how can the pack recover from a SCC fault? The datasheet says that this fault can only be cleared by disconnecting the charger. But if we tie CHGST high, how can that be done?

    It seems we need some way to replicate the functionality of that third pin but without having it actually exist.

  • 0 in reply to John M
    TI__Guru 54715 points

    Hi John,

    The SCC recovery is a good reason to provide a way for CHGST to go low.  Waking a pack from shutdown is a need for CHGST to go high.  Connecting CHGST with pull up or pull down can leave the part disabled in certain situations.

    See http://e2e.ti.com/support/power_management/battery_management/f/180/t/177092.aspx for a possible circuit to latch CHGST high until fault.

    Another possibility is to use the feature noted in the datasheet page 27 that CPCKN sufficiently below GND causes VREG to come on.  VREG might trigger a circuit to hold CHGST high for some time and wake the part.  A circuit like a microprocessor reset or voltage supervisor might do this.  A drawback of this is that since there is no datasheet parameter associated with this VREG-on behavior, although it is a part of the basic design of the IC, if a part did not provide VREG TI would likely still consider the part good. If you use this type approach, the part will operate mostly with CHGST low, so SCC faults would recover immediately and the FET could cycle until the charge returned to normal.  If the part shuts down from UV, it will stay on for the duration of the CHGST pulse, so there can be some cycling in UV as the part wake, charges briefly, and shuts down again until above the hysteresis voltage.  There may be a forum topic with other information but I did not find it quickly.

    There are likely other circuits to provide some control for CHGST which may be appropriate in certain situations.

  • 0 in reply to WM5295
    Expert 2135 points

    Hmm....my reply from yesterday has disappeared.

    Thank you for the info and link! Looks like we have some tough decisions to make about handling CHGST. We'll review your info and that circuit.