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TLC59401 / TLC5940 additional SCLK behaviour

Other Parts Discussed in Thread: TLC59401

Hello,

I just need to be clear with information about additional SCLK after XLAT pulse of first GS mode data shift. This says datasheet for TLC59401 on page 18. But when you look at figure 12 on page 12 and figure 14 on page 13 you will see additional SCLK after every (two drawn) XLAT of GS data. It is difference.

I am facing chip initialization problem. First of all I am filling DC register with all ones, then GS register with all zeroes (or ones if want use DC mode of control only). After such init randomly some channels don't light and it is worst then when I start without any initialization.

My question is what to do when I am loading DC register after GS one. For example after power up I fill DC, make XLAT, fill GS, make XLAT and additional SCLK, fill DC, make XLAT and what now? Is also additional SCLK necessary?


Jarda Jedlinsky

  • Hi,

    The additional SCLK is used to set LOD error date to lower bit side of the input shift register.
    If you don't need LOD data from SOUT, then 193'th SCLK is not necessary.

    Also, we suggest send GS data before DC data after power up.

    Best regards,

    Feifei