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LM5068 internal VREG voltage

K. Sasaki14
Guru 10200 points
Other Parts Discussed in Thread: LM5068, LM5067

Please let me know the internal VREG voltage value of LM5068. It is not described on datasheet.
Our customer would like to check voltage which is added to TIMER pin.
I think there is no guaranteed value, thus reference value is OK.

Best Regards,
Kohei Sasaki 

  • 0
    TI__Genius 12420 points

    Hi Kohei,

     

    This detailed information is not too easy to find since it is one of the older and less commonly used devices inherited from National Semiconductor.

     

    However, if the customer is asking about the TIMER voltage, the voltage of Vreg is not added to the timer pin.

     

    There is a current source of 6uA (used for insertion time) or 240uA (for fault time). Vreg must simply be strong enough to serve as a current source to charge the TIMER pin to 4V (which it is). 

    The current source will charge the TIMER pin to 4V (typ) and then the TIMER will be disharged (either by 6uA, or 27mA).

     

    See start-up operation (page 11) and figure 27 (page 17):

     

    Thanks!

    Alex

  • 0 in reply to Alex Triano
    Guru 10200 points

    Alex-san,

    Thank you for your reply.
    I understand your answer, however I think it is Auto-Retry operation and Latch-Off operation is difference. It is described on datasheet P.13 as the following.

    "At the fault condition, after reaching the 4V, the TIMER pin will continue to ramp-up with 6µA current source until it reaches the internal regulated voltage, which is equivalent to the saturation GATE drive voltage."

    From the above, we are thinking TIMER pin reaches the internal VREG, and we would like to know the voltage value.
    Please let me know If there is any false recognition.

    Best Regards,
    Kohei Sasaki

  • 0 in reply to K. Sasaki14
    TI__Genius 12420 points

    Hi Kohei,

     

    You are correct. Are you pointed out in the datasheet, it will continue to ramp until it reaches the internal regulated voltage, which is equivalent to the saturation GATE drive voltage.

     

    The "saturation gate drive voltage" is spec'd in the datasheet on page 5). With 48V input, it is 9V min, 10.6V typ, 12V max. With 10V input, it is 7.8V typ.

     

    I went to verify this in the lab, but realized I only have the default EVM which is the LM5068-2 (retry version). I tested this and verified it cycles between 4V and 1V, but I could not test this latch version to verify.

     

    Note: if this is a new design, we would suggest considering the LM5067 device. It is very similar to the LM5068 (and same 100V ABS_MAX voltage), but the LM5067 offers power limiting. This helps enable more robust designs, can reduce cost by using cheaper MOSFETs, or can allow higher power designs using the same MOSFET.

     

    Also, we have design tools for the LM5067 to help make it easier to work with. Simply visit www.ti.com/hotswap --> "Tools & Software" to download our Design Calculator Tools.

     

    We are also launching a video tutorial series to ti.com to help use this tool. In the meantime, you can download a copy from here:

    though this link expires tomorrow (May 20th) and I cannot generate a new link until then. If you are interested in the future, let me know and I can post a new link.

     

    Thanks!

    Alex