CSD17312Q5: Peak voltage at switching node over VDSS

Here is the response from our apps team:

"He needs to make sure he has an accurate waveform. With fast dv/dt slew rate, the measurement is sensitive to probe loop size and measurement points. The best way is to use a differential probe with long horn tip to measure right on the device pins.

Regardless, the ringing is too high. The design needs to be improved to reduce the ringing peak with some margin."

Dear Brett,

Thank you for reply.

I wanted to use 40 volt FET at first but I could not.  Because RDS(on) and Qg of it were higher than expected.

So I  want to continue to use CSD17312, if possible.

Now I got the waveforms of the switching node.  I used single-ended probe with very short ground wire.

Here are screenshoots:

(1)switching node (10V/div , 1usec/div)

(2)Zoom of rising edge(10V/div , 10nsec/div)

Would you advice me on my circuit?

Best regards

We do have a 40V device coming up, the CSD18510Q5B, that sounds like it will be very closer to your spec. 

Typical resistance at 4.5Vgs will be around 1.3mOhm (maybe 1.6 max), and gate charge will be around 60nC, just a little bit above your target. Or the CSD18512Q5B, released two weeks ago, will be just over your resistance spec at 2.3mOhm max, but a bit under your gate charge spec. 

It looks to me like your FET is not in avalanche mode. Some FETs have BVDSS a few volts higher than their datasheet rating as there is a bit of a distribution. But we cannot make any guarantee that the next 30V FET will behave the same.