UC2843A: R and C slope compensation possibility

Hello Yoshwa-san,

Yes, the design procedure for slope compensation discussed in the Application Note SLUA110 (for Figure 3) can be applied to the UCC2843A with some modification. The design principle is the same.

The UC2843A datasheet shows a similar circuit for slope compensation in Figure 9 (on page 11) which includes a buffer transistor to minimize the loading of the compensation network on the RT/CT network. If the R-C timing and duty-cycle limit accuracy is not critical, then the buffer transistor may be avoided. But if the frequency and duty-cycle must remain unaffected by the compensation network, then the buffer transistor should be used.

Slope compensation is also discussed further in the Applications section of the datasheet on page 16, along with equations 12 and 13. This discussion does not have as many details as in the Ap-note, so the Ap-note design procedure gives a better understanding of the calculations need. A minor modification to this Ap-note procedure may be necessary if you intend to add an offset voltage to the current sense signal, as discussed in the datasheet (page 16, just after equation 11). In this case you will have to select the values of Rs2 and Rp first, before using the Ap-note procedure to calculate the value of Rs1. (Note: Rs1 and Rs2 in the UCC2843A datasheet correspond to R2 and R1 in the Ap-note, respectively.)

I hope this helps you with your design using the UC2843A.

Regards,
Ulrich