• State Resolved
  • Locked Locked
  • Replies 6 replies
  • Subscribers 62 subscribers
  • Views 1254 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LM5119: 4 phase operation with two LM5119s

Ryuji
Guru 20090 points
Part Number: LM5119
Other Parts Discussed in Thread: TPS40140

Hello,

Can we use LM5119 as 4 phase operation if we use external oscillator to RT input of LM5119 and 90° phase shifted clock input to other LM5199?

Best Regards,
Ryuji

  • 0
    TI__Mastermind 24075 points
    HI Ryuji,

    I'm not sure if two LM5119 can work for 4phase design.
    Can you consider TPS40140? It is a stackable controller.

    Thanks
    Qian
  • 0 in reply to Qian Chen
    Guru 20090 points

    Hi Qian san,

    I appreciate your reply.
    Unfortunately, the input voltage requirement is 60V.
    Thus we couldn't use TPS40140.

    Best Regards,
    Ryuji

  • 0 in reply to Ryuji
    TI__Mastermind 24075 points
    Ryuji-san,

    I found below post on E2E.
    looks like 2xLM5119 can work for 4phase design.


    e2e.ti.com/.../341974

    Thanks
    Qian
  • 0 in reply to Qian Chen
    Guru 20090 points
    Hello Qian san,

    Thank you for the reply but I couldn't access the link.
    I got the message as "Access Denied (Note: a common reason this message is displayed is because the thread was deleted)"
    I appreciate it if you share the information in your mentioned link.

    Best Regards,
    Ryuji
  • 0 in reply to Ryuji
    TI__Mastermind 24075 points
    Ryuji-san,

    Below is the informatoin on that post. What's Vout in your design?


    LM5119 is not designed for 4-phase operation originally, but is capable of operating in 4-phase with some limitations.

    1. A COMP in master channel and three COMP pins in slave channel & slave IC should be tied together.
    2. Three FB pins in slave channel should be pulled up to local VCC
    3. To synchronize two ICs, 90 degree phase-shifted clocks should be applied.
    4. RES should be tied to VCC. This means hiccup mode operation should be disabled.
    5. TSD / VCCuv / UVshutdown events on master side IC will shut down all four channels eventually, by pulling down the shared COMP node.
    6. TSD / VCCuv / UVshutdown events on slave side IC will shut down the IC under fault.
    7. All UVLO pins should be tied together. This means UVLO hysteresis current will be 4x20uA in 4-phase.
    8. Css on master channel is recommended to be much larger value than the other Css capacitors.
  • 0 in reply to Qian Chen
    Guru 20090 points
    Qian san,

    I appreciate your support.
    The design requirement is Vin=48V Vout=14V, Iout=25A.

    Best Regards,
    Ryuji