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LM5109A: Minimum PWM frequency to keep HB (boot capacitor) charged

Doug Hauck
Prodigy 90 points
Part Number: LM5109A
Other Parts Discussed in Thread: LM5109, , UCC27712, LM5109B

Hi I'm planning on using the LM5109A to drive a couple of low Rdson MOSFETs.  The two MOSFETs are configured to drive a solenoid from automotive voltages.  Solenoid manufacturer claims 200 Hz PWM frequency should work to drive it.  Drive voltage at 13.8V, Vdd of the LM5109 = 12V.  So HB would like to be at 25.8V right?

The question is, will this part work with such a low frequency?  What is the lowest drive frequency a person could use and still guarantee that the Cboot capacitor (1 uF per my calculations) would still hold HB up?

Would it work to toggle the gate driver at 20 kHz for a bit just to charge Cboot?  If this is a good idea (and it probably isn't), then how long could you expect that high side MOSFET to stay on before parasitics  allow that gate voltage to drop far enough to let the MOSFET turn back off?

MOSFET has 2 ohms gate resistance and 25nC of total gate charge.

The gate-source leakage current is 100nA (maybe this answers that last question 2).

Thanks!!

  • 0
    TI__Mastermind 21285 points

    Hello Doug,

    Thank you for the interest in the LM5109A half bridge driver. I am an applications engineer in the High Power Driver group at TI and will work to address your questions.

    For low frequency operation and sizing the bootstrap capacitor, you need to take into account the driver IC bias current and gate to source leakage current which you provided.

    A good reference recent datasheet for the boot strap capacitor selection is the UCC27712 datasheet, section 9.2.2.2. There is an equation to calculated the total charge including the MOSFET gate charge and charge related to quiescent currents and operating frequency.

    Qtotal=Qg + IQBS/Fsw. In this case add the 100na gate to source leakage to IQBS.  

    For the LM5109 the IHB, which is the same as IQBS, is 0.2mA  Maximum.

    The Qtotal= 25nC + 0.2001mA/200Hz=1025.5nC So the bias currents dominate the required charge.

    For the CBoot calculation we should allow more ripple than the conservative 0.5V guideline in the UCC27712 datasheet.

    VDD will be 12V, with 0.7V drop on the boot diode there will be 11.3V on the boot capacitor during the boot capacitor charge. The HB UVLO falling threshold is 7.1V-0.4V maximum which is 6.7V.  We can allow 11.3V-6.7V maximum ripple to confirm the minimum Cboot value.

    Cboot=Qtotal/deltaVboot= 1025.5nC/4.6V= 0.23uF

    So the boot capacitor of 1uF suggested will result in a ripple voltage of 0.23uF/1uF x 4.6V = 1.058V

    In this application at 200Hz 1V of ripple on the boot capacitor will result in ~10.3V to 11.3V drive amplitude for the high side MOSFET. This should be fine for this application.

    This does not take into account any gate to source resistor which would increase the voltage ripple.

    I hope this answers your questions.

    Regards,

    Richard Herring

  • 0 in reply to Richard Herring
    Prodigy 90 points
    Thank you for the help. This allowed me to move forward with confidence. I'm using the LM5109B instead of the A.

    Now I'm wondering about calculating dead time so I don't burn up my h-bridge with shoot through. Is it as simple as
    (tMONmax - tMONmin) + (tHPHLmax - tLPHLmin) ?
    Seems like the datasheet shows these values as no load values, so there must be gate resistance and capacitance you have to take into account as well, no?

    Thanks again,

    Doug
  • 0 in reply to Doug Hauck
    TI__Mastermind 30020 points

    Hi Doug,

    I am an applications engineer supporting High Power Drivers, and I work with Richard. Richard is out for the holiday, so I'll help to answer this question.

    The propagation delay matching specs tMON and tMOFF take into account any variations the part will experience in propagation delay over the operating range. Refer to the lefthand image of Figure 1, as well as the graph in Figure 7, both in the datasheet for LM5109B. Furthermore, because the minimum matching is 0ns (perfect match), the expression simplifies to just the maximum matching.

    You are correct that the values are specified for no-load conditions. To accurately calculate dead time, the turn on and turn off times of the MOSFET must be known and added to the propagation delay matching. These times are a function of the MOSFET capacitances, gate resistances, drive voltages, and driver current limits. MOSFETs that switch large Vds voltages will also have longer turn on and turn off times, due to the nonlinear capacitances responsible for the Miller plateau. Direct calculation of MOSFET turn on and turn off times is very difficult because of these nonlinear capacitances, though some methods can give reasonable estimates. Multiple MOSFET manufacturers have released application notes describing how to estimate these times.

    Dead time should be at least as long as the sum of turn on or turn off time and the propagation delay matching maximum, with a conservative allowance for estimation error and MOSFET temperature and part-to-part variations. Dead time may ultimately require some tuning after the circuit is constructed and tested.

    Regards,