Dear sirs.
I am working with the UC3827-1 controller, for a high voltage psu.
In the breadboard stage, I have found that the output signal of the Buck stage, pin 2, has a minimum duty cycle of around 6-7%, and a max. duty cycle of 97%.
It is the low end that puzzels me, and my question is simply: Is this normal for the chip, that it starts at 7% duty cycle, and not all the way down to 1%, or should I continue to search for a reason.
I have tried to breadboard two individuel chips, they display identical behaviour.
Supply is a well bypassed 12V
Current sense amplifier is passified by connecting pin 7 to pin 9, and pin 8 to ground.
Current error amplifier is forced low by grounding pin 13, pin 12 to Vref, and PWM reference voltage derived from Vref, ramp to pin 5 is directly from pin 18, (CT)
I have made a short video, where blue is ramp voltage into pin 5, yellow is PWN Buck output viltage @ pin 2, and cyan is the simulated voltage error signal. You can view it here:
I hope this makes sense, and am waiting your advice.
Cheers, Finn Hammer