LMZ14203H: regulation problem

Hi Samuele,

Yes this is very odd. The LMZ14203H should allow your application of 34V to 24V at maximum load 3A. The part has been tested for even higher input voltages up to 42V and has been able to stay above 90% efficiency for the full load range (Figure 9). Do you have access to an e-load where you can step the load current up from 1A to 3A slowly? The switching frequency of the device can be lowered during a current limit event.

If possible can you monitor the following on the module: VIN, VOUT, FB, and IOUT. Also if you can provide the schematic this will help with the review. 

Regards,

Jimmy  

Thank you Jimmy,

I made further measurements as you suggested, and attached you find:

1) our schematic (excerpt from the global schematic)

2) some measurements with the oscilloscope, with related explanations.

I checked the circuit once again but I didn't find anything wrong...

This is really an unexpected problem!

what do you think?

thanks, samuele

LMZ14203H.pdf0624.schematic.pdf

Hi Samuele,

The schematic you've provided looks okay and follows the typical component selection detailed in the box of Section 8.2. Looking at your waveforms, Vfb looks rather unstable at worse case 2.5A loading which measures a Vfb_delta of ~600mV and might be signs of instability. Vfb should be flat and regulated at 0.8V reference. If possible can you provide the PCB layout for me to review as well? Poor board layout may interrupt the performance of the dc-dc converter and result in poor regulation or instability as a result of EMI,ground bounce and resistive voltage drops in PCB traces. 

Also can you try to add more output caps to help stabilize the output voltage and effectively the feedback voltage? Perhaps add 2x10uF on the output and test. 

Regards,

Jimmy 

Hi Jimmy,

you confirmed my doubts about the entity of Vfb_delta, that should be flat indeed, and I tried to remove the 20nF between FB and VOUT: the problem seems now bypassed, and I have full regulation till 2.5A and flat Vfb!

I read about the capacitance (22nF suggested) placed on those pins, that should create a zero in the transfer function and help stabilize the output during load transients. In the same time, maybe, it brings an amplified output ripple on the FB pin, thus creating that Vf_delta...

I'm a little bit concerned now whether or not I should definitely remove those 20nF from our design, or maybe reduce the capacitance to, let's say, 2.2nF...

Does, what I said, make any sense? It sounds to me a little bit strange that changing Texas' suggested design is the right way, but in this way the converter now works correctly...

thanks, I wait for your feedback (without ripple...:-D)

samuele

Hi Samuele,

Do you also have a PCB layout that you can share?  Having Cff should help improve stability and  the transient responses as you've mentioned and also detailed in the app note. Your results seem to imply the opposite since when you removed the 2 x 10nF Cff caps, you were able to get full regulation and a flat Vfb which implies a stable design. One thing that I think could impact stability is the PCB layout copper area of the FB node. Because FB node is high impedance, it is recommended to have as small of a copper area and trace width as possible to minimize noise coupling. 

Regards,

Jimmy 

Hi Samuele,

Can you also put some more output caps? I get the feeling that the caps are derating and might be causing the converter to be unstable. Perhaps put an electrolytic or 3 x 10uF on the output and retest.

Regards,
Jimmy

Hi Samuele,

Can you provide any update on this? At 24V, your 20uF output capacitance will significantly reduce because of DC bias. I suspect this is the cause of the instability.

Regards,
Jimmy

Hi Jimmy, I'm sorry for the delay but I was out of office on these days...the total output capacitance is actually almost 900uF: 4x220uF electrolytic capacitors, plus 2x10uF(visible in the snapshot). Anyway, only the 2x10uF are placed directly at the output, while the electrolitic caps are 4÷5 cm away from the IC, so I guess the main contribution (in terms of stability) comes from the 2x10uF. So, I think you are right: I tried to put some extra caps, now it's 4x10uF, the ripple on Vfb is still there but reduced, while the output is now stable till R_load = 9R.
Since I still have ripple on Vfb, I guess that maybe 40uF are still not enough, but the capacitance change on X7R caps should be 10% @ 35Vdc, so 4x10uF should assure more than 30uF...
You say that Vfb should be flat, with no ripple at all, so maybe some other actions should be taken...

thanks,
samuele

Thanks Jimmy, I think I'll definitely follow your advice, now it works!
thank you for your support!
samuele