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LMZ14203H: This design is suspected of having noise, please help to check

Sam Wu85
Prodigy 70 points
Part Number: LMZ14203H
Other Parts Discussed in Thread: LM10010, OPA454

Hi TI

We are the equipment manufacturer of ATE, developing DPS. At present, we use LMZ14203H as the source of DPS chip, but have noise by customer reponse when performing CMOS image sensor test. It is suspected that it is caused by power source. Please help confirm Is the circuit correct? Thank you!!

The following is the power information:
1. LMZ14203H VIN: 26.4
2. VOUT range from 5V to 23V by digipot adjust, typical: 11.5V

a. We want to know what is the possibility that this circuit will cause power noise?

b. Is it feasible to design the digipot at the RFBT location?

Thank you for your response

  • 0
    TI__Guru 50120 points

    Hi Sam,

    How do the customers describe the noise? Do you have any measurements / values for this noise?

    • A.) Do you also have the PCB layout for review? To reduce EMI, the datasheet recommends reducing the high di/dt loop by making the connection between Cin and the VIN/GND pins as small as possible. This may lower the EMI effect and lower noise in the customer's application.Regarding the schematic, I would recommend designing the output capacitance based on the lowest voltage selection in your application. The lowest voltage in your application will require the highest amount of output capacitance for stability. Looking at Table 8.2 for reference, the 5V output should have around 100uF of output capacitance. 
    • B.) There are no issues with using a digipot to control the top resistor, though it is not as fine tuned as something like a VID programmer LM10010 that injects current into the FB node and adjusts the output voltage accordingly.

    Regards,

    Jimmy

  • 0 in reply to Jimmy Hua
    TI__Guru 50120 points

    Hi Sam

    Do you have any updates on the questions I've listed above?

    Regards,

    Jimmy

  • 0 in reply to Jimmy Hua
    Prodigy 70 points

    Hi Jimmy

    This issue still exists and we are sill doing some experiments to confirm that it's caused by power or ground.

    About noise information, the only photo by customer provide like an attachment, N.O. 1 & N.O.2 is fail, N.O. 3 is pass

  • 0 in reply to Sam Wu85
    TI__Guru 50120 points

    Hi Sam,

    This was definitely not what I assumed when you mentioned noise in the power path. I was interpreting it as EMI noise or output ripple noise.

    For reference, there is an app note that discusses different filtering techniques to improve EMI and output noise.

    Perhaps you could tell the customer to try put a high frequency bypass cap between FB and GND to try and filter noise out of the FB pin.

    Regards,

    Jimmy

  • 0 in reply to Jimmy Hua
    TI__Guru 50120 points

    Hi Sam,

    Any updates on whether a high frequency  bypass cap on FB helped with filtering the noise?

    Regards,
    Jimmy

  • 0 in reply to Jimmy Hua
    TI__Guru 50120 points

    Hi Sam,

    Any updates on this? Also have you tried to remove the digipot and use discrete resistor values? I suspect that with a mechanical digipot, you are introducing some ESR and ESL that may impact the regulator by possibly allowing a path for noise to couple onto the feedback node. This is why I also suggested using a high frequency bypass capacitor on the feedback node to help mitigate the noise.

    Regards,

    Jimmy

  • 0 in reply to Jimmy Hua
    TI__Guru 50120 points

    Hi Sam,

    I have not heard back from you in a while so I assume you were able to solve the issue on  your end. Because of this I will be closing the thread. If you need any further help or have any questions, simply reply to this message and it will reopen for us to continue our discussion.

    Regards,

    Jimmy

  • 0 in reply to Jimmy Hua
    Prodigy 70 points

    Hi Jimmy

    Sorry for late reply, this noise issue has been solved, thanks for your support, thanks for your help and support!!

    But can I ask you other questions? About the OPA454 output voltage unstable when capacitors(>10uF) loading 

  • 0 in reply to Sam Wu85
    TI__Guru 50120 points

    Hi Sam,

    Thank you for the feedback and reply. For the OPA454 I would recommend creating a new post so that the appropriate applications engineer can reply to your question in a timely manner.

    Regards,

    Jimmy