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TPS68470: PLL lock timeout issue

Praveen A1
Prodigy 10 points
Part Number: TPS68470

Hi TI team,

We are using TPS68470 PMIC for one of our smallest camera boards.

While powering the board on, we are seeing the PLL lock time out issues.

Once lock timeout happens, the driver shuts down the PLL and shuts down all the powers and the camera does not work.

We tried couple of things.

  • The “Crystal oscillator amp input capacitance control” of PLLCTL Register: changed from 0pF to 14pF
  • Increased the lock timer to 4ms by setting the register PLLSWR to 0x13
  • Measured the clocks at OSC_OUT and OSC_IN pins -> clock is stable, but need to verify the jitter parameters.

These debugs did not help in resolving the issue.

I am attaching the I2C logs from the driver.

Please help in debugging this issue.

Are there any best known methods to debug this kind of issues?

Please note that this is a very small board (4.4mm in Y), hence the layout also needs to be looked carefully.

We have referenced the OSC_IN and OSC_OUT signals to +VIRLED_OUT instead of GND as there was a space crunch, we are not sure if this is causing the malfunction.

We can share the schematics and layout over a secured communication.

Please suggest.

cam_I2C_Logs_Booting_06082019_1729_for_TI.csv

  • 0
    TI__Genius 10380 points

    Hi,

    The crystal resonator is a noise sensitive circuit. Connecting this to anything besides a clean ground could affect the Phase Locked Loop characteristics and prevent locking before the configured timeout window. Biasing the OSC_IN and OSC_OUT pins could also affect the oscillator amplifier's operating characteristics and consequently the PLL lock time. 

    If possible, modify your board such that OSC_IN and OSC_OUT are referenced to ground without damaging the system. Then, restart the system to determine whether referencing OSC_IN and OSC_OUT to +VIRLED_OUT is the root cause. I also suggest monitoring the oscillator and HCLK waveforms during startup. If the PLL still does not lock, these waveforms can be helpful for debugging. We can also discuss how to privately share schematics and layout at that time.

    Thanks,

    Gerard