We have three TLC5943 driver chips daisy chained in our application.
We are latching data into the driver chips using Auto Refresh Data Function Timing 3 as shown in Figure 27 of the TLC5943 data sheet. So we clock in 3 x 256 bits of GS Data, then while BLANK is high, we pulse XLAT once. This should load GS data into both GS Data latch 1 and 2, and PWM data will be controlled by this new brightness on the first clock after BLANK falling edge, correct?
As we clock the next set of data into the driver, if we monitor SOUT, we would expect to see the first 17 bits of data containing Status Information (SID), correct? But when we look at the data on SOUT, we are seeing the first 32-bits changed.
In the capture below, we are writing 0x1FF to each channel, but the first 2 sets of 16-bits are corrupt. Can you explain?
