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TPS2660: TPS2660x RTN to GND Connection

Jamie Maxwell
Expert 1530 points
Part Number: TPS2660

We are having an issue where we are failing our CE testing (EFT at 2kV) and found that the only way to resolve the issue is to add a capacitor between the RTN and GND connections of this eFuse.  There is a note in the datasheet that says:

 "Internally, the device has reverse input polarity protection block between RTN and the GND terminal. Connecting RTN pin to GND pin disables the reverse input polarity protection feature and the TPS2660x gets permanently damaged when operated under this fault event."

Can you please look into whether there are concerns on adding cap between RTN and GND? 

Do they have any suggestions on how to get around the failing EFT at 2kV (probably a difficult question to answer since this is so dependent on application)?

Thanks

Jamie

  • 0
    Prodigy 40 points

    Just to provide some more background, we believe this issue is caused by the fast transient noise coupling onto the input signals and disabling the output of the device.  Because the input is referenced to RTN instead of directly to GND, the RTN is allowed to bounce sufficiently during these events and cause the inputs to violate the designed thresholds.  By connecting RTN and GND with capacitor we managed to pass the 2kV EFT tests.

    We still need to perform some tests to validate the above theory but wanted to run the solution past TI first and perhaps, you may have other ideas to get around this.  We do want to preserve the reverse voltage protection feature of the device.

  • 0 in reply to Chris Lee3
    TI__Expert 8630 points

    Hello Jamie, Chris,

    In TPS2660 devices, RTN is connected to GND internally when input voltage (at IN Pins) is positive and it is disconnected from GND in case of negative voltage (reverse polarity) on input. The external capacitance between RTN and GND will be shorted during normal operation of the device (Device is powered up and input voltage is above POR threshold).

    Is the voltage going below ZERO during negative EFT pulses?

    If it the input voltage is going below ZERO or above OVP set-point, increasing cap on IN pins will help.

  • 0 in reply to Lokesh Ghulyani
    TI__Expert 8630 points

    Hello Jamie, Chris,

    I am closing this thread. if you have any further queries, Please feel free to post here or open a new thread.