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LM5176: Minimum and maximum dead time.

Part Number: LM5176

The datasheet has a typical dead time of 45ns. What are the maximum and minimum values for the dead time?

  • Hi Gabe,

    Thanks for reaching out with your questions and for considering the LM5176 in your design.

    I am looking into the values for you. What is your concern on the tolerance of the dead time?

    Thanks,

    Garrett

  • I'm seeing ringing on the low side FET of the buck stage when operating at full load (when high side turns off). This ringing was approaching the 60V max for the SW pin on the part. I added a gate resistor to slow down the turn on/off to reduce the ringing but I'm concerned about shoot through now that I've slowed the gate drive because the dead time is fixed. The FETs are low Vgs threshold parts (1.9V) so the turn on is inherently faster than turn off because of the RC time constant.

    I would have added a diode to the gate drive to create a slow turn on fast turn off had I know about the issue before designing the circuit but all I have to work with is a gate drive resistor so I'm trying to balance slowing the turn-on to reduce the transient with turning on fast enough to eliminate the chance of shoot through on the bridge. This is why I'd like to know the deadtime range. To make sure the resistor I select will work over the whole range not just the typical value.

  • Hi Gabe,

    Can you post the waveform the switch node ringing and the gate drive voltages? If possible please post the schematic as well. How much gate resistance did you add and on which MOSFET? 

    Thanks,

    Garrett

  • This is the LM5176EVM TI dev board. Here is the setup:

    Input Voltage = 32V

    Output Voltage = 24VDCDC Dev Board Switching Waveforms_TI.docx

    Switching Frequency = 200kHz

    All FETS, Q1-Q8 are P/N: CSD18540Q5BT

    Gate resistors, R2, R3, R4, R5 are 5Ohms

    I made other modifications to the board to allow these currents, but I'm not going to list them all here.

    I'm attaching a word document with the waveforms at 1A load and at 17A load. At 17A load, the transient over voltage reaches ~50V  when the high side buck FET switches on which I think is acceptable if I'm not going to have any dead time issues.

    I have also tried 10Ohms for R2-5. This completely eliminated the overshoot in the yellow waveform at 17A, but lead to a failure in the FETs, I assumed it was shoot through. It was on the edge of this event because it worked properly and then it failed.

    I have also tried 0Ohms for R2-5. This cause the overshoot in the yellow waveform at 17A to reach nearly 60V.

    And I've tried ferrite beads in place of resistors on R2-5. The transient was still around 50-60V and with too large of an impedance caused a shoot through failure.

  • Hi Gabe,

    Understood. 10 Ohms of gate resistance is pretty large and could be causing shoot through.

    First thing regarding the overshoot, are you probing with a a very short ground lead over the low side MOSFET? If the ground lead is long this can coule noise into the measured signal. To help reduce the over shoot on the switch node a subber circuit can be using dampen the ringing. This application note can be used to add a snubber to the buck switch node helping reduce the ringing.

    Thanks,

    Garrett

  • Hi Garrett,

    Yes, I have a modified probe that I use for making high dV/dt measurements for power electronics switching waveforms. I measured directly across the drain source of each FET on the low side of the buck leg. One is actually a little higher than the other and the results I sent you are for the one that is worse.

    I'm doing the testing on the dev kit for convenience, but I've already designed a circuit that is basically a copy of the dev kit into our design. This DCDC is only small piece of a much larger board. So at this point I can't add a snubber, there's just no room and no placeholder parts. I can do this on the next turn of the board, but we aren't planning an immediate board turn so I need to be confident this will work in the mean time. The only part that I have to adjust is the gate resistor to each FET. I know that 0 ohms is too small and 10 ohms is too high. I am planning to use 5 ohms which seems to produce adequate results with a sample of 1 in the lab at room temp, but what happens over temp changes and multiple builds?

    I appreciate your feedback, thoughtful suggestions and knowledge on these issues, but I think it would still be helpful for me to understand the limits of the dead time because I only have the gate resistor to adjust in the current design. Can you obtain the min/max values for the dead time of the part?

    Thanks. 

  • Hello Gabe,

    After looking through the data the minimum dead time is going to be around 35ns. This is including the effect of temperature.

    Thanks,

    Garrett

  • Garrett, Thanks for digging up this info for me, much appreciated!