Assume UCC27511 IN+ always keep high and VDD supply kick-in later, what is delay time between VDD=4.2V(UVLO on threshold typ.) to OUT pulled high(td) as below figure?
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Assume UCC27511 IN+ always keep high and VDD supply kick-in later, what is delay time between VDD=4.2V(UVLO on threshold typ.) to OUT pulled high(td) as below figure?
Hello John,
Thanks for reaching out.
I will look into this and get back to you early next while you're reattaching the image.
Regards,
-Mamadou
John,
Since we're discussing this thread offline, I will mark the thread as "resolved" and "close" it.
Regards,
-Mamadou