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ISO5452-Q1: 软关断功能异常

Part Number: ISO5452-Q1
Other Parts Discussed in Thread: ISO5452, UCC21750

您好,

         想问下,ISO5452芯片是否有软关断功能丢失的情况?从Datasheet得知,desat触发阈值时,芯片阻断输出,将OUTL拉至低电平持续2us。而实际结果是只有600ns左右,相比正常的关断时间只多了200ns左右。如图所示:黄色CH1通道为desat脚外部电容充电,蓝色CH2为芯片门极输出,触发阈值后,门极输出下降时间为600ns左右。另外想问下芯片内部如何实现软关断的,拉至低电平持续2us的?

还有一个现象是,在高压短路测试,芯片输出硬关,软关断过程并未实现,然而desat阈值已经触发。

 希望能够得到解答,不胜感激,谢谢。

  • Hi,


    The STO timing is given for a certain load capacitance which is specified in the datasheet. What load capacitance are you driving in your testing?

    Best

    Dimitri

  • Hi Dimitri,

    how the ISO5452 do the soft turn off? and how to extend the turn off time?

    thanks.

  • Betty,

    The STO  is done by a controlled current (130mA) which is the I_OLF spec in the datasheet. When STO procedure is activated after a DESAT event is detected, Output High/Low will be disabled, will discharge teh gate at this current, terminating once OUTL reaches a threshold ~VEE+2V, then OUTL and Miller clamp (if connnected) will take over and pull down the gate to VEE.

    You may extend the STO time by placing a Capacitor + resistor in filter in the output path. This is more done when an external totem-pole Current buffer is connected to limit the effective STO current at the outputs of the current buffer.

    The concept behind this is that the STO current will discharge the extra capacitor and current is limited by the resistor in addition to pulling current from the CB, or from the IGBT gate if no CB is used.

    Please see this excerpt from UCC21750 datasheet which explains the concept and basic calculation involved

    > https://www.ti.com/lit/ds/symlink/ucc21750.pdf#page=45


    Note that this necessarily adds an additional load to the driver.



    Please let me know if you have any additional questions on this.


    Best

    Dimitri