TPS65720: Device fails to shutdown DC/DC1 switching output when HOLD_DCDC1 pulled LOW, AC input pin low, and all configuration registers set to default values

Please share the schematic snippet and scope captures using the "Insert/Edit Media" button that looks like a little Polaroid photo with a '+' plus sign in the bottom right corner.

Hello,

The above shows an Oscilloscope capture as described below:

Ch1 Yellow, AC
Ch2 Blue, VBAT
Ch3 Red, HOLD_DCDC/HOLD_LDO
Ch4 Green, DCDC Out (VDD)

The below shows the schematic relevant to to the TPS65720:

From the TPS65720 datasheet:

8.3.10.6.3 HOLD_DCDC1 Input Actively high hold input for DCDC1. Logically OR´d with the DCDC1 hold Bit . If the input is driven HIGH after PB_IN was pulled LOW, the DCDC1 converter stays on after PB_IN was released.

And the definition of this bit is:

• DEFDCDC1: Bit 7, HOLD_DCDC1:
  • • 0 = DCDC1 is disabled when HOLD_DCDC1 pin is pulled LOW and PB_IN is released HIGH
    • 1 = DCDC1 stays enabled when HOLD_DCDC1 pin is pulled LOW and PB_IN is released HIGH

Please confirm the value of this bit by reading Register 0x07 by I2C.

Hi Brian,

This problem is occurring when all TPS65720 registers are in their default power-on values; however, I've just queried bit 7 of register 0x07 (DEFDCDC1) and confirmed that it is '0'.

Thanks,

Mac