TPS563201: Phase/Gain margin simulation question

Vincent Chen64988

Part Number: TPS563201

Hi Team,

Here is my customer's SCH and would like to know TPS563201's simulation result of gain/phase margin. I found WEBENCH doesn't have this kind of simulation function. Could team help to run simulation? If additional information is needed for running simulation, please let me know.

Thanks very much.

Vincent Chen

over 4 years ago

0 Edwin Zang over 4 years ago

TI__Expert 6425 points

Hi Vincent,

loading is 1.5A, right? will I run simulation at 1.5A. is it ok?

BRs,

Edwin.

0 Vincent Chen64988 over 4 years ago in reply to Edwin Zang

TI__Expert 4480 points

Hi Edwin,

Allow me to check with customer and get back to you.

Thanks very much.

Vincent Chen

0 Vincent Chen64988 over 4 years ago in reply to Vincent Chen64988

TI__Expert 4480 points

Hi Edwin,

It is confirmed that we can run simulation at 1.5A.

Thanks very much for your support.

Vincent Chen

0 Edwin Zang over 4 years ago in reply to Vincent Chen64988

TI__Expert 6425 points

Hi Vincent,

By running simulation, bandwidth is 48kHz. phase margin is about 43 degree.

Phase margin is a little small, it's suggested to remove one 47uF output cap. After removing one 47F output cap, bandwidth is 61kHz, phase margin is 52 degree. please refer the second picture.

0 Vincent Chen64988 over 4 years ago in reply to Edwin Zang

TI__Expert 4480 points

Hi Edwin,

Thank you very much for your support.

Vincent Chen

0 Vincent Chen64988 over 4 years ago in reply to Vincent Chen64988

TI__Expert 4480 points

Hi Edwin,

R&D is requested by his customer to have the worst case's simulation result. His customer replied him "Capacitor value derated with DC voltage, tolerance and dielectric derating over temperature. L can be derated using DC current temperature and tolerance. Include the worst case tolerance."

Could you please help to simulate it again with the worst case of L and C? There are two units of TPS563201 designed at this system.

1. 12V to 3V3. Run simulation at 2A. As you mentioned if removing one 47uF output cap can get better result, please remove the cap.

Inductor's spec.

350044100G _U76.pdf

Capacitor's spec.

TAIYO_mlcc01_e.pdf

2. 12V to WIFI_3V3. Run simulation at 1.8A.

Inductor's spec.

PHT041H-4R7MS_U16.pdf

Thanks very much.

Vincent Chen

Capacitor value derated with DC voltage, tolerance and dielectric derating over temperature. L can be derated using DC current temperature and tolerance. Include the worst case tolerance.

0 Edwin Zang over 4 years ago in reply to Vincent Chen64988

TI__Expert 6425 points

Hi Vicent,

I will send the test result by email. Because there are two many waveforms. i close this request.

my Email edwin-zang@ti.com...

BRs,

Edwin.

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TPS563201: Phase/Gain margin simulation question