UCC27282-Q1: Delay Matching Time Understanding:

Hello Kiran,

I will answer the questions you have about the delay matching.

Is it a delay introduced by driver if their propagation delays between HI-HO and LI-LO are different ?

Yes, since there are two different driver channels for HI/HO and LI/LO there are delays in each channel signal. If there is some slight difference there will be some low value delay "mismatch"

Is this value 0ns, if their propagation delays between HI-HO and LI-LO are matched ?

That is correct.

Is this value 0ns, if there is a deadtime between HI-HO and LI-LO more than 7ns ?

Since this is a half bridge driver, especially the UCC27282 which has interlock, the LI and HI signals will not be on at the same time. There can be deadtime in the LO and HO outputs as determined by the LI and HI inputs. Basically the outputs will follow the inputs including dead time of LI and HI. The UCC27282 has input interlock which prevents the LO and HO from being on at the same time, so LO and HO cannot be driven from the same input signal.

Confirm if this addresses your questions, or you can post additional questions on this thread.

Regards,

Hi Richard,

Thanks for quick response.

To understand question3 a bit more,

Lets make an assumption that interlock feature is not there. And then

If we provide a dead-time between HI & LI signals, though there are changes in propagation delays of high-side / low-side channels, does the driver still introduce delay matching time ?

(Of course we are not applying HI and LI signals at the same time in this condition as per the delay matching time definition but there is a chance to match the propagation delays of channels)

Regards,

Kiran.

Hi Richard,

I think you missed the term "dead-time" between complementary HI and LI signals that we are providing from Micro controller.

So the signals are not applied at same time. And the interlock circuit wont operate.

(Means, the HI and LI signals are not applied at the same time which is wrong as per the delay matching time definition)

So if we maintain deadtime between complementary HI and LI signals more than max delay matching time of 7ns, and

if there is a difference in propagation delays of LI to LO and HI to HO channels,

does the driver introduce delay matching time to match the propagation delays of channels ??

Main point that we would like to understand is what is the total deadtime between HO and LO when there is a difference in propagation delay of channels ??

is it (deadtime provided by micro-controller + delay-matching time of the driver) or

is it (deadtime provided by micro-controller only)

kindly answer both queries separately.

Regards,

kiran.

Hi Richard,

Reopening again..........

Based on whole conversation, we found 2 cases and explained them with examples in the attached image.

Case1 (tp1 < tp2): The driver further increases the deadtime provided by microcontroller by delay-matching time of 7ns. This is similar to the equation in our previous discussion (deadtime provided by the controller + the delay matching time of the driver)

Case2 (tp1 > tp2): The driver decreases the deadtime provided by microcontroller by delay-matching time of 7ns. Where as here (deadtime provided by the controller - the delay matching time of the driver)

Are both cases possible in practical or only case1 ?  case2 is something I am doubtful because the deadtime can decrease and switches are ON for more time. This may lead to cross-conduction.

Please clarify us. We are worried that if case2 happens there is a change in deadtime value in SW of controller.

Regards,

Kiran.