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LM5107: LO Latched High

Part Number: LM5107

Hi Team,

I have a customer evaluating the LM5107SD and seeing an issue where the LO pin is latched high whenever VCC is supplied to the board despite changes to the LI pin. Is there any known instance where the outputs would remain latched high?

Thanks,

Matt

  • Hello Matt,

    I am not aware of any specific instance where the LO should be in an on state when the LI is switching. 

    There are some general cases to check with half bridge drivers in general. 

    First confirm the LI is switching to levels that guarantee the high and low state. Make sure the low is <0.8V and high is > 2.2V.

    If there is excessive driver output overshoot or undershoot, this can affect the correct state of the driver. Confirm that LO is < VDD+0.3V and > than VSS-0.3V when switching. 

    Also if there is a very fast ramp of VDD rising this may affect the driver output state on startup. Can the customer confirm the VDD rise time?

    Also confirm the driver IC VSS is properly connected to ground.

    Confirm if this addresses your questions, or you can post additional questions on this thread.

  • I was  using a benchtop power supply and I measured the ramp up time for VCC 12V signal to be around 35us. Please let me know your thoughts on this value.

    For some background, there were previous instances where this IC was working correctly, and they see this behavior on quite a few boards. But sometimes, the HO pin gets latched to VCC instead of LO pin.

  • Hello Matt,

    Can you provide a schematic of your application, with component values for the LM5107 support components. Also if you can capture waveforms of the behavior you mention with VDD, HI, LI, and LO. If you see this LO incorrect state on initial application of VDD show the waveforms when VDD is ramping. Also if you have cases where HO is in the wrong state, record plots of VDD, HI, LI and HO.

    Regards,