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LM5025A: Review LM5025A PCB layout for better EMC Robust(Surge test)

Part Number: LM5025A

Hi Team,

My customer is using our LM5025A in one key project and using active clamp forward topology. This is a key project for customer and customer hope TI can help review the PCB(Schematic already verified before) to help the pass the Surge test(4.4KV Common mode surge test on L, N and L&N to earth). Below is their schematic and PCB layout(AD format):

LM5025A Active clamp forward.pdf

LM5025A Active clamp forward PCB.zip

Would you pls help review the PCB for LM5025A part, if possible, kindly give some suggestion for help passing the Surge test, thanks a lot!

Best regards,

Sulyn

  • Hello Sulyn,
    You attached the schematic file as a pdf and the pcb file as an Altium file. This makes it very difficult to correlate the schematic nodes with the pcb traces.
    Can you attache the Altium project files with the schematic so that I can cross reference both drawings ?

    Thanks
    John
  • Hi John,
    Thanks for the quick reply, sorry for the inconvenient, because it's too big, so I just send you the PCB file.
    I will try to send you the whole project tomorrow after got from customer, thanks!

    Best regards,
    Sulyn
  • Hi John,

    Pls find enclosed project file for review, thanks a lot for your support on this case!

    LM5025A Forward.zip

    Best regards,

    Sulyn

  • Hi Sulyn,
    Thanks for sending the pcb file. Altium is crashing when I try to open them so I will try to give some suggestions based on the pcb file and the schematic pdf.
    Line surge between L, N and earth is going to apply a high voltage across the isolation barrier and the pcb needs to be designed in order to keep this high voltage away from any low voltage sensitive circuitry where it can do damage. Here are some areas to look at:
    (1) the forward transformer used by the LM5025A needs to have a dielectric rating so that it can withstand this surge.
    (2) common mode capacitors from the primary side to earth should be located as close as possible to input and output connectors. This ensures that the high voltage surge skips around and over the power supply module.
    (3) The optocoupler used for feedback (U7) and the pcb traces and pins around U7 should be isolated as much as possible with direct traces to the associated components.
    (4) Ground loop should be short with low impedance traces for high dV/dT signals.
    (5) Low levels control type AGND signals should be connected directly together and high current signals should have a separate GND with a single point connection from AGND to GND.
    (6) The forward transformer should be wound so as to minimise the primary to secondary capacitance. I think that a shield between the primary and secondary will help minimise the chance of a breakdown here. Also grounding the transformer core with a flux band will prevent the core from floating to a high voltage. This will also help with EMI reduction.

    Hope this helps.
    Regards
    John
  • Hi John,

    Many thanks for this support! I'm sorry for the inconvenience that you can not open and link the sch and PCB file.

    Pls find below project file, you can open it link the sch and PCB, your suggestions about this customer layout are appreciated, thanks! 

    LM5025A test-2018-11-19.rar

    Best regards,

    Sulyn

  • Hi John,
    A reminder that when you click the sch file in AD, you may need to wait for a while, sorry for the inconvenience and support!

    Best regards,
    Sulyn
  • Hi Sulyn,
    I tried to open the schematic file but Altium just crashes every time.
    Sorry but my review will be limited to the items highlighted in my previous response.
    Regards
    John
  • Hi Sulyn,
    I was able to open the pcb and schematics after a very very long wait
    The layout looks very good and the only issue I could see is that the heatsink with the forward FET is floating.
    For EMI purposes this should be connected to the primary side return.
    The rest of the layout followed the guidelines I tried to describe in the above post.

    Hope this helps
    Regards
    John
  • Hi John,
    Thanks you so much for reviewing the layout! Not sure can you describe more clear how the heat sink be connected to primary side return(Maybe you can help show more detail from schematic, I'm not very clear about this). On another side, as you mentioned, this is for EMI optimization. Not sure does this also help for Surge test which is noise injection into the board?

    Best regards,
    Sulyn
  • Hi Sulyn,
    All they need do is drill a hole in the pcb and drive a metal screw from the pcb into the heatsink.
    The head of the screw needs to make electrical contact with a pcb trace which is connected to the primary side return.
    By this means the heatsink is electrically grounded.
    This is a very standard procedure and it is impossible for me to better describe.
    I have no more comments on the pcb layout
    Regards
    John