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LP2951: Spike in the output during turn ON

Part Number: LP2951

Hi,

We are using LP2951-33DR LDO to power up the LCD module. The current requirement is 10mA.

We see the spike at the output during turn ON. The amplitude is 4.4V. We changed the output capacitor from 100nF to 3.3uF but issue still exists.

What could cause these spikes at the output ? What can be done to minimize the spike ?

Regards,

Vasanth

  • Hi Vasanth,

    Can you share the schematic you are testing (above shows the RT2560)? The LP2951 has a few more pins. Here is a typical configuration:

    Note: the error pin is optional as this is an open-drain output.

    Also, if you care about low IQ, the TPS709 has only 1uA of IQ.

  • Hi,

    Sorry for the inconvenience caused. Below is the circuit used

    Regards,

    Vasanth

  • Hi Vasanth,

    Thanks for the updated schematic, John is out on vacation but I wanted to follow up with you. It is important to note that some overshoot is common for this LDO, in fact it is shown in figure 21 of the datasheet.

    Also, I see that the shutdown pin is grounded and your scope shot with the red circle indicating the overshoot, shows Vout very closely following Vin. This indicates to me that the device could be in dropout as Vin reaches the value of the output voltage which will cause the output to overshoot.

    When an LDO is in dropout the output voltage is below the accuracy specification. This condition causes the error amplifier to force the gate of the pass transistor such that the pass transistor is fully on and provides the least resistance possible, meaning VOUT tracks VIN as closely as possible. When the input voltage recovers, the error amplifier must force the gate of the pass device to the opposite rail making the pass transistor more resistive. The change in gate voltage takes a finite amount of time, as dictated by the bandwidth of the error amplifier. If VIN rises quickly during that time then VOUT tracks VIN and overshoots above the nominal output voltage. 

    One way you may be able to avoid this is by adding a feedforward capacitor between SENSE and VTAP, we usually recommend 1nf-100nf for LDOs. This will AC couple the two nodes together and slow down the rise in the output voltage during startup which could reduce the overshoot you see. There are pros and cons of using a Cff which we have covered in this App Note